Searched defs:SPORT0_RCLKDIV (Results 1 - 6 of 6) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-blackfin/mach-bf533/
H A DdefBF532.h162 #define SPORT0_RCLKDIV 0xFFC00828 /* SPORT0 Receive Clock Divider */ macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-blackfin/mach-bf527/
H A DdefBF52x_base.h189 #define SPORT0_RCLKDIV 0xFFC00828 /* SPORT0 Receive Clock Divider */ macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-blackfin/mach-bf548/
H A DdefBF548.h75 #define SPORT0_RCLKDIV 0xffc00828 /* SPORT0 Receive Serial Clock Divider Register */ macro
H A DdefBF549.h76 #define SPORT0_RCLKDIV 0xffc00828 /* SPORT0 Receive Serial Clock Divider Register */ macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-blackfin/mach-bf561/
H A DdefBF561.h263 #define SPORT0_RCLKDIV 0xFFC00828 /* SPORT0 Receive Clock Divider */ macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-blackfin/mach-bf537/
H A DdefBF534.h170 #define SPORT0_RCLKDIV 0xFFC00828 /* SPORT0 Receive Clock Divider */ macro

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