| /freebsd-11.0-release/contrib/llvm/lib/CodeGen/ |
| H A D | StackMaps.cpp | 79 int RegNum = TRI->getDwarfRegNum(Reg, false); local
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| /freebsd-11.0-release/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 968 unsigned RegNum = MO.isUndef() ? UINT_MAX : TRI->getEncodingValue(Reg); local
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| /freebsd-11.0-release/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsAsmPrinter.cpp | 265 unsigned RegNum = TRI->getEncodingValue(Reg); local
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| /freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 184 unsigned RegNum; member in struct:__anon2995::SparcOperand::RegOp
329 static std::unique_ptr<SparcOperand> CreateReg(unsigned RegNum, unsigned Kind, argument
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| /freebsd-11.0-release/contrib/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCCodeEmitter.cpp | 1472 unsigned RegNum = GetX86RegNum(MO) << 4; local
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | AMDILCFGStructurizer.cpp | 517 insertCondBranchBefore(MachineBasicBlock *blk, MachineBasicBlock::iterator I, int NewOpcode, int RegNum, DebugLoc DL) argument
528 insertCondBranchEnd(MachineBasicBlock *MBB, int NewOpcode, int RegNum) argument
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| /freebsd-11.0-release/contrib/llvm/tools/clang/include/clang/Basic/ |
| H A D | TargetInfo.h | 727 const unsigned RegNum; member in struct:clang::TargetInfo::AddlRegName
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXAsmPrinter.cpp | 304 unsigned RegNum = RegMap[Reg]; local
|
| /freebsd-11.0-release/contrib/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 1342 unsigned RegNum = Reg.EnumValue; local
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 176 unsigned RegNum; member in struct:__anon2707::AArch64Operand::RegOp
181 unsigned RegNum; member in struct:__anon2707::AArch64Operand::VectorListOp
1640 CreateReg(unsigned RegNum, boo argument
1650 CreateVectorList(unsigned RegNum, unsigned Count, unsigned NumElements, char ElementKind, SMLoc S, SMLoc E, MCContext &Ctx) argument
1958 unsigned RegNum = isVector ? matchVectorRegName(Name) local
1984 unsigned RegNum = matchRegisterNameAlias(lowerCase, false); local
2015 unsigned RegNum = matchRegisterNameAlias(Head, true); local
3113 unsigned RegNum = matchRegisterNameAlias(Tok.getString().lower(), false); local
4370 unsigned RegNum = tryParseRegister(); local
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 184 unsigned RegNum; member in struct:__anon2822::HexagonOperand::RegTy
582 static std::unique_ptr<HexagonOperand> CreateReg(unsigned RegNum, SMLoc S, argument
1989 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); local
2008 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); local
2027 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); local
2049 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); local
2074 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); local
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 3879 int MipsAsmParser::matchRegisterByNumber(unsigned RegNum, unsigned RegClass) { argument
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 469 unsigned RegNum; member in struct:__anon2788::ARMOperand::RegOp
474 unsigned RegNum; member in struct:__anon2788::ARMOperand::VectorListOp
503 unsigned RegNum; member in struct:__anon2788::ARMOperand::PostIdxRegOp
1686 unsigned RegNum = getCondCode() == ARMCC::AL ? 0: ARM::CPSR; local
2515 CreateCCOut(unsigned RegNum, SMLoc S) argument
2532 CreateReg(unsigned RegNum, SMLoc S, SMLoc E) argument
2630 CreateVectorList(unsigned RegNum, unsigned Count, bool isDoubleSpaced, SMLoc S, SMLoc E) argument
2644 CreateVectorListAllLanes(unsigned RegNum, unsigned Count, bool isDoubleSpaced, SMLoc S, SMLoc E) argument
2656 CreateVectorListIndexed(unsigned RegNum, unsigned Count, unsigned Index, bool isDoubleSpaced, SMLoc S, SMLoc E) argument
2706 CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy, unsigned ShiftImm, SMLoc S, SMLoc E) argument
2920 unsigned RegNum = MatchRegisterName(lowerCase); local
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 2584 unsigned RegNum = State.getFirstUnallocated(ArgRegs); local
2612 unsigned RegNum = State.getFirstUnallocated(ArgRegs); local
[all...] |