| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenMux.cpp | 92 unsigned PredR = 0; member in struct:__anon2248::HexagonGenMux::CondsetInfo
108 unsigned DefR, PredR; member in struct:__anon2248::HexagonGenMux::MuxInfo
|
| H A D | HexagonEarlyIfConv.cpp | 131 unsigned PredR = 0; member in struct:__anon2238::FlowPattern
709 predicateInstr(MachineBasicBlock *ToB, MachineBasicBlock::iterator At, MachineInstr *MI, unsigned PredR, bool IfTrue) argument
760 predicateBlockNB(MachineBasicBlock *ToB, MachineBasicBlock::iterator At, MachineBasicBlock *FromB, unsigned PredR, bool IfTrue) argument
777 buildMux(MachineBasicBlock *B, MachineBasicBlock::iterator At, const TargetRegisterClass *DRC, unsigned PredR, unsigned TR, unsigned TSR, unsigned FR, unsigned FSR) argument
[all...] |
| H A D | HexagonExpandCondsets.cpp | 745 getReachingDefForPred(RegisterRef RD, MachineBasicBlock::iterator UseIt, unsigned PredR, bool Cond) argument
908 renameInRange(RegisterRef RO, RegisterRef RN, unsigned PredR, bool Cond, MachineBasicBlock::iterator First, MachineBasicBlock::iterator Last) argument
958 Register PredR = MP.getReg(); local
[all...] |
| H A D | HexagonHardwareLoops.cpp | 462 unsigned PredR, PredPos, PredRegFlags; local
1915 Register PredR = PN->getOperand(i).getReg(); local
|
| H A D | HexagonISelLowering.cpp | 347 Register PredR = MRI.createVirtualRegister(&Hexagon::PredRegsRegClass); local
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | EarlyCSE.cpp | 380 CmpInst::Predicate PredL, PredR; local
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 311 getMaskedTypeForICmpPair(Value *&A, Value *&B, Value *&C, Value *&D, Value *&E, ICmpInst *LHS, ICmpInst *RHS, ICmpInst::Predicate &PredL, ICmpInst::Predicate &PredR) argument
441 foldLogOpOfMaskedICmps_NotAllZeros_BMask_Mixed( ICmpInst *LHS, ICmpInst *RHS, bool IsAnd, Value *A, Value *B, Value *C, Value *D, Value *E, ICmpInst::Predicate PredL, ICmpInst::Predicate PredR, llvm::InstCombiner::BuilderTy &Builder) argument
571 foldLogOpOfMaskedICmpsAsymmetric( ICmpInst *LHS, ICmpInst *RHS, bool IsAnd, Value *A, Value *B, Value *C, Value *D, Value *E, ICmpInst::Predicate PredL, ICmpInst::Predicate PredR, unsigned LHSMask, unsigned RHSMask, llvm::InstCombiner::BuilderTy &Builder) argument
609 ICmpInst::Predicate PredL = LHS->getPredicate(), PredR = RHS->getPredicate(); local
1363 FCmpInst::Predicate PredL = LHS->getPredicate(), PredR = RHS->getPredicate(); local
2819 ICmpInst::Predicate PredL = LHS->getPredicate(), PredR = RHS->getPredicate(); local
[all...] |