| /freebsd-10-stable/contrib/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAGInfo.h | 57 EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
74 EmitTargetCodeForMemmove(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
90 EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo) const argument
104 EmitTargetCodeForMemcmp(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const argument
145 EmitTargetCodeForStrcmp(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPeephole.cpp | 298 MachineOperand Op1 = MI->getOperand(S1); local
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| /freebsd-10-stable/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcISelDAGToDAG.cpp | 202 SDValue Op0, Op1; local
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| /freebsd-10-stable/contrib/llvm/lib/DebugInfo/ |
| H A D | DWARFDebugFrame.cpp | 110 uint64_t Op1 = Opcode & DWARF_CFI_PRIMARY_OPERAND_MASK; local
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| /freebsd-10-stable/contrib/llvm/lib/ExecutionEngine/Interpreter/ |
| H A D | Execution.cpp | 2020 GenericValue Op1 = getOperandValue(CE->getOperand(1), SF); local
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelDAGToDAG.cpp | 289 SDValue Op0, Op1; local
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| /freebsd-10-stable/sys/contrib/dev/acpica/compiler/ |
| H A D | asltree.c | 1245 TrLinkPeerNode( ACPI_PARSE_OBJECT *Op1, ACPI_PARSE_OBJECT *Op2) argument
1382 TrLinkChildNode( ACPI_PARSE_OBJECT *Op1, ACPI_PARSE_OBJECT *Op2) argument
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.cpp | 786 uint32_t Op0 = 3, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; local
815 uint32_t Op1 = (Bits >> 11) & 0x7; local
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| /freebsd-10-stable/contrib/llvm/lib/Target/XCore/Disassembler/ |
| H A D | XCoreDisassembler.cpp | 252 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) { argument
270 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, argument
358 unsigned Op1, Op2; local
371 unsigned Op1, Op2; local
384 unsigned Op1, Op2; local
397 unsigned Op1, Op2; local
411 unsigned Op1, Op2; local
424 unsigned Op1, Op2; local
437 unsigned Op1, Op2; local
522 unsigned Op1, Op2; local
536 unsigned Op1, Op2; local
550 unsigned Op1, Op2, Op3; local
563 unsigned Op1, Op2, Op3; local
576 unsigned Op1, Op2, Op3; local
589 unsigned Op1, Op2, Op3; local
602 unsigned Op1, Op2, Op3; local
616 unsigned Op1, Op2, Op3; local
631 unsigned Op1, Op2, Op3; local
645 unsigned Op1, Op2, Op3; local
659 unsigned Op1, Op2, Op3, Op4, Op5, Op6; local
693 unsigned Op1, Op2, Op3, Op4, Op5; local
713 unsigned Op1, Op2, Op3; local
732 unsigned Op1, Op2, Op3; local
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineShifts.cpp | 24 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
312 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, ConstantInt *Op1, argument
[all...] |
| H A D | InstCombineCalls.cpp | 600 Value *Op1 = Builder->CreateBitCast(II->getArgOperand(1), local
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| H A D | InstCombineMulDivRem.cpp | 119 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
407 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
674 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
767 foldUDivPow2Cst(Value *Op0, Value *Op1, const BinaryOperator &I, InstCombiner &IC) argument
777 foldUDivNegCst(Value *Op0, Value *Op1, const BinaryOperator &I, InstCombiner &IC) argument
786 foldUDivShl(Value *Op0, Value *Op1, const BinaryOperator &I, InstCombiner &IC) argument
808 visitUDivOperand(Value *Op0, Value *Op1, const BinaryOperator &I, SmallVectorImpl<UDivFoldAction> &Actions, unsigned Depth = 0) argument
847 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
908 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
989 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1114 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1146 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1178 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1249 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
[all...] |
| /freebsd-10-stable/contrib/llvm/include/llvm/Analysis/ |
| H A D | ScalarEvolution.h | 589 const SCEV *getAddExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2, argument
607 const SCEV *getMulExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2, argument
|
| /freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 586 SDValue Op1 = Op.getOperand(1); local
661 SDValue Op1 = Op.getOperand(1); local
[all...] |
| H A D | FastISel.cpp | 382 unsigned Op1 = getRegForValue(I->getOperand(1)); local
443 unsigned Op1 = getRegForValue(I->getOperand(1)); local
1235 FastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) argument
1256 FastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill) argument
1345 FastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm) argument
1369 FastEmitInst_rrii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm1, uint64_t Imm2) argument
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 432 SDValue Op1 = N->getOperand(1); local
815 SDValue Op1 = N->getOperand(1); local
1529 SDValue Op1 = N->getOperand(1); local
2424 SDValue Op0, Op1; local
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Target/X86/ |
| H A D | X86MCInstLower.cpp | 263 unsigned Op0 = Inst.getOperand(0).getReg(), Op1 = Inst.getOperand(1).getReg(); local
|
| /freebsd-10-stable/contrib/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 576 SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2, argument
[all...] |
| /freebsd-10-stable/contrib/llvm/include/llvm/Support/ |
| H A D | PatternMatch.h | 1095 m_Intrinsic(const T0 &Op0, const T1 &Op1) { argument
1101 m_Intrinsic(const T0 &Op0, const T1 &Op1, const T2 &Op2) { argument
1107 m_Intrinsic(const T0 &Op0, const T1 &Op1, const T2 &Op2, const T3 &Op3) { argument
|
| /freebsd-10-stable/contrib/llvm/lib/Analysis/ |
| H A D | ConstantFolding.cpp | 561 SymbolicallyEvaluateBinop(unsigned Opc, Constant *Op0, Constant *Op1, const DataLayout *DL) argument
[all...] |
| H A D | ValueTracking.cpp | 47 static void ComputeMaskedBitsAddSub(bool Add, Value *Op0, Value *Op1, bool NSW, argument
133 static void ComputeMaskedBitsMul(Value *Op0, Value *Op1, bool NSW, argument
1353 Value *Op1 = I->getOperand(1); local
[all...] |
| H A D | InstructionSimplify.cpp | 198 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS); local
269 BinaryOperator *Op1 local
592 SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
653 SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
734 SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
859 SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
868 SimplifyFAddInst(Value *Op0, Value *Op1, FastMathFlags FMF, const Query &Q, unsigned MaxRecurse) argument
910 SimplifyFSubInst(Value *Op0, Value *Op1, FastMathFlags FMF, const Query &Q, unsigned MaxRecurse) argument
946 SimplifyFMulInst(Value *Op0, Value *Op1, FastMathFlags FMF, const Query &Q, unsigned MaxRecurse) argument
974 SimplifyMulInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1037 SimplifyFAddInst(Value *Op0, Value *Op1, FastMathFlags FMF, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1043 SimplifyFSubInst(Value *Op0, Value *Op1, FastMathFlags FMF, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1049 SimplifyFMulInst(Value *Op0, Value *Op1, FastMathFlags FMF, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1057 SimplifyMulInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1065 SimplifyDiv(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1137 SimplifySDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1145 SimplifySDivInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1153 SimplifyUDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1161 SimplifyUDivInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1167 SimplifyFDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned) argument
1180 SimplifyFDivInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1188 SimplifyRem(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1242 SimplifySRemInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1250 SimplifySRemInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1258 SimplifyURemInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1266 SimplifyURemInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1272 SimplifyFRemInst(Value *Op0, Value *Op1, const Query &, unsigned) argument
1285 SimplifyFRemInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1293 SimplifyShift(unsigned Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1337 SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
1353 SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1362 SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const Query &Q, unsigned MaxRecurse) argument
1384 SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1394 SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const Query &Q, unsigned MaxRecurse) argument
1420 SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1430 SimplifyAndInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1521 SimplifyAndInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1529 SimplifyOrInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1615 SimplifyOrInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1623 SimplifyXorInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1675 SimplifyXorInst(Value *Op0, Value *Op1, const DataLayout *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 402 SDValue Op1 = N->getOperand(1); local
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 423 SDValue Op1 = N.getOperand(1); local
398 expandDisp(SystemZAddressingMode &AM, bool IsBase, SDValue Op0, uint64_t Op1) argument
1098 SDValue Op1 = Node->getOperand(1); local
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Bitcode/Reader/ |
| H A D | BitcodeReader.cpp | 1408 Constant *Op1 = ValueList.getConstantFwdRef(Record[2], local
1418 Constant *Op1 = ValueList.getConstantFwdRef(Record[1], local
1430 Constant *Op1 = ValueList.getConstantFwdRef(Record[1], OpTy); local
1444 Constant *Op1 = ValueList.getConstantFwdRef(Record[2], OpTy); local
1458 Constant *Op1 = ValueList.getConstantFwdRef(Record[2], OpTy); local
[all...] |