| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.h | 28 MipsHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) argument
42 MachineIRBuilder &MIRBuilder; member in class:llvm::MipsCallLowering::MipsHandler
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| H A D | MipsLegalizerInfo.cpp | 462 SelectMSA3OpIntrinsic(MachineInstr &MI, unsigned Opcode, MachineIRBuilder &MIRBuilder, const MipsSubtarget &ST) argument
477 MSA3OpIntrinsicToGeneric(MachineInstr &MI, unsigned Opcode, MachineIRBuilder &MIRBuilder, const MipsSubtarget &ST) argument
489 MSA2OpIntrinsicToGeneric(MachineInstr &MI, unsigned Opcode, MachineIRBuilder &MIRBuilder, const MipsSubtarget &ST) argument
502 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; local
[all...] |
| H A D | MipsCallLowering.cpp | 92 IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) argument
122 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, argument
214 OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstrBuilder &MIB) argument
375 lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef<Register> VRegs) const argument
415 lowerFormalArguments( MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef<ArrayRef<Register>> VRegs) const argument
498 lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const argument
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVCallLowering.cpp | 24 bool RISCVCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, argument
47 bool RISCVCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, argument
37 lowerFormalArguments( MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef<ArrayRef<Register>> VRegs) const argument
|
| /freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.h | 40 MachineIRBuilder &MIRBuilder; member in class:llvm::LegalizerHelper
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| H A D | CallLowering.h | 114 ValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, argument
175 MachineIRBuilder &MIRBuilder; member in struct:llvm::CallLowering::ValueHandler
276 virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, argument
288 lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef<Register> VRegs) const argument
305 lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef<ArrayRef<Register>> VRegs) const argument
316 lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const argument
[all...] |
| H A D | RegBankSelect.h | 507 MachineIRBuilder MIRBuilder; member in class:llvm::RegBankSelect
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| H A D | IRTranslator.h | 277 translateICmp(const User &U, MachineIRBuilder &MIRBuilder) argument
282 translateFCmp(const User &U, MachineIRBuilder &MIRBuilder) argument
358 translateAdd(const User &U, MachineIRBuilder &MIRBuilder) argument
361 translateSub(const User &U, MachineIRBuilder &MIRBuilder) argument
364 translateAnd(const User &U, MachineIRBuilder &MIRBuilder) argument
367 translateMul(const User &U, MachineIRBuilder &MIRBuilder) argument
370 translateOr(const User &U, MachineIRBuilder &MIRBuilder) argument
373 translateXor(const User &U, MachineIRBuilder &MIRBuilder) argument
377 translateUDiv(const User &U, MachineIRBuilder &MIRBuilder) argument
380 translateSDiv(const User &U, MachineIRBuilder &MIRBuilder) argument
383 translateURem(const User &U, MachineIRBuilder &MIRBuilder) argument
386 translateSRem(const User &U, MachineIRBuilder &MIRBuilder) argument
389 translateIntToPtr(const User &U, MachineIRBuilder &MIRBuilder) argument
392 translatePtrToInt(const User &U, MachineIRBuilder &MIRBuilder) argument
395 translateTrunc(const User &U, MachineIRBuilder &MIRBuilder) argument
398 translateFPTrunc(const User &U, MachineIRBuilder &MIRBuilder) argument
401 translateFPExt(const User &U, MachineIRBuilder &MIRBuilder) argument
404 translateFPToUI(const User &U, MachineIRBuilder &MIRBuilder) argument
407 translateFPToSI(const User &U, MachineIRBuilder &MIRBuilder) argument
410 translateUIToFP(const User &U, MachineIRBuilder &MIRBuilder) argument
413 translateSIToFP(const User &U, MachineIRBuilder &MIRBuilder) argument
416 translateUnreachable(const User &U, MachineIRBuilder &MIRBuilder) argument
419 translateSExt(const User &U, MachineIRBuilder &MIRBuilder) argument
423 translateZExt(const User &U, MachineIRBuilder &MIRBuilder) argument
427 translateShl(const User &U, MachineIRBuilder &MIRBuilder) argument
430 translateLShr(const User &U, MachineIRBuilder &MIRBuilder) argument
433 translateAShr(const User &U, MachineIRBuilder &MIRBuilder) argument
437 translateFAdd(const User &U, MachineIRBuilder &MIRBuilder) argument
440 translateFMul(const User &U, MachineIRBuilder &MIRBuilder) argument
443 translateFDiv(const User &U, MachineIRBuilder &MIRBuilder) argument
446 translateFRem(const User &U, MachineIRBuilder &MIRBuilder) argument
465 translateResume(const User &U, MachineIRBuilder &MIRBuilder) argument
468 translateCleanupRet(const User &U, MachineIRBuilder &MIRBuilder) argument
471 translateCatchRet(const User &U, MachineIRBuilder &MIRBuilder) argument
474 translateCatchSwitch(const User &U, MachineIRBuilder &MIRBuilder) argument
477 translateAddrSpaceCast(const User &U, MachineIRBuilder &MIRBuilder) argument
480 translateCleanupPad(const User &U, MachineIRBuilder &MIRBuilder) argument
483 translateCatchPad(const User &U, MachineIRBuilder &MIRBuilder) argument
486 translateUserOp1(const User &U, MachineIRBuilder &MIRBuilder) argument
489 translateUserOp2(const User &U, MachineIRBuilder &MIRBuilder) argument
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86LegalizerInfo.cpp | 90 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; local
|
| H A D | X86CallLowering.cpp | 99 OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, argument
187 lowerReturn( MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef<Register> VRegs) const argument
230 IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, CCAssignFn *AssignFn) argument
302 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, CCAssignFn *AssignFn) argument
313 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, CCAssignFn *AssignFn, MachineInstrBuilder &MIB) argument
327 lowerFormalArguments( MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef<ArrayRef<Register>> VRegs) const argument
378 lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const argument
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 33 bool CallLowering::lowerCall(MachineIRBuilder &MIRBuilder, const CallBase &CB, argument
176 handleAssignments(MachineIRBuilder &MIRBuilder, SmallVectorImpl<ArgInfo> &Args, ValueHandler &Handler) const argument
186 handleAssignments(CCState &CCInfo, SmallVectorImpl<CCValAssign> &ArgLocs, MachineIRBuilder &MIRBuilder, SmallVectorImpl<ArgInfo> &Args, ValueHandler &Handler) const argument
[all...] |
| H A D | Legalizer.cpp | 324 std::unique_ptr<MachineIRBuilder> MIRBuilder; local
168 legalizeMachineFunction(MachineFunction &MF, const LegalizerInfo &LI, ArrayRef<GISelChangeObserver *> AuxObservers, LostDebugLocObserver &LocObserver, MachineIRBuilder &MIRBuilder) argument
[all...] |
| H A D | InlineAsmLowering.cpp | 85 getRegistersForValue(MachineFunction &MF, MachineIRBuilder &MIRBuilder, GISelAsmOperandInfo &OpInfo, GISelAsmOperandInfo &RefOpInfo) argument
240 buildAnyextOrCopy(Register Dst, Register Src, MachineIRBuilder &MIRBuilder) argument
273 lowerInlineAsm( MachineIRBuilder &MIRBuilder, const CallBase &Call, std::function<ArrayRef<Register>(const Value &Val)> GetOrCreateVRegs) const argument
[all...] |
| H A D | IRTranslator.cpp | 296 bool IRTranslator::translateFSub(const User &U, MachineIRBuilder &MIRBuilder) { argument
314 bool IRTranslator::translateFNeg(const User &U, MachineIRBuilder &MIRBuilder) { argument
277 translateBinaryOp(unsigned Opcode, const User &U, MachineIRBuilder &MIRBuilder) argument
326 translateCompare(const User &U, MachineIRBuilder &MIRBuilder) argument
352 translateRet(const User &U, MachineIRBuilder &MIRBuilder) argument
374 translateBr(const User &U, MachineIRBuilder &MIRBuilder) argument
825 translateIndirectBr(const User &U, MachineIRBuilder &MIRBuilder) argument
855 translateLoad(const User &U, MachineIRBuilder &MIRBuilder) argument
898 translateStore(const User &U, MachineIRBuilder &MIRBuilder) argument
963 translateExtractValue(const User &U, MachineIRBuilder &MIRBuilder) argument
978 translateInsertValue(const User &U, MachineIRBuilder &MIRBuilder) argument
998 translateSelect(const User &U, MachineIRBuilder &MIRBuilder) argument
1016 translateCopy(const User &U, const Value &V, MachineIRBuilder &MIRBuilder) argument
1031 translateBitCast(const User &U, MachineIRBuilder &MIRBuilder) argument
1041 translateCast(unsigned Opcode, const User &U, MachineIRBuilder &MIRBuilder) argument
1049 translateGetElementPtr(const User &U, MachineIRBuilder &MIRBuilder) argument
1138 translateMemFunc(const CallInst &CI, MachineIRBuilder &MIRBuilder, Intrinsic::ID ID) argument
1186 getStackGuard(Register DstReg, MachineIRBuilder &MIRBuilder) argument
1207 translateOverflowIntrinsic(const CallInst &CI, unsigned Op, MachineIRBuilder &MIRBuilder) argument
1285 translateSimpleIntrinsic(const CallInst &CI, Intrinsic::ID ID, MachineIRBuilder &MIRBuilder) argument
1327 translateConstrainedFPIntrinsic( const ConstrainedFPIntrinsic &FPI, MachineIRBuilder &MIRBuilder) argument
1350 translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID, MachineIRBuilder &MIRBuilder) argument
1528 getStackGuard(getOrCreateVReg(CI), MIRBuilder); local
1626 translateInlineAsm(const CallBase &CB, MachineIRBuilder &MIRBuilder) argument
[all...] |
| H A D | LegalizerHelper.cpp | 491 createLibcall(MachineIRBuilder &MIRBuilder, const char *Name, const CallLowering::ArgInfo &Result, ArrayRef<CallLowering::ArgInfo> Args, const CallingConv::ID CC) argument
509 createLibcall(MachineIRBuilder &MIRBuilder, RTLIB::Libcall Libcall, const CallLowering::ArgInfo &Result, ArrayRef<CallLowering::ArgInfo> Args) argument
520 simpleLibcall(MachineInstr &MI, MachineIRBuilder &MIRBuilder, unsigned Size, Type *OpType) argument
532 createMemLibcall(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstr &MI) argument
624 conversionLibcall(MachineInstr &MI, MachineIRBuilder &MIRBuilder, Type *ToType, Type *FromType) argument
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 89 OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, argument
237 lowerReturnVal(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef<Register> VRegs, MachineInstrBuilder &Ret) const argument
265 lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef<Register> VRegs) const argument
286 IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, CCAssignFn AssignFn) argument
415 lowerFormalArguments( MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef<ArrayRef<Register>> VRegs) const argument
473 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstrBuilder MIB, CCAssignFn *AssignFn) argument
502 lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const argument
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 56 IncomingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, argument
112 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, CCAssignFn *AssignFn) argument
123 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstrBuilder MIB, CCAssignFn *AssignFn) argument
135 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstrBuilder MIB, CCAssignFn *AssignFn, CCAssignFn *AssignFnVarArg, bool IsTailCall = false, int FPDiff = 0) argument
276 lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef<Register> VRegs, Register SwiftErrorVReg) const argument
395 handleMustTailForwardedRegisters(MachineIRBuilder &MIRBuilder, CCAssignFn *AssignFn) argument
[all...] |
| H A D | AArch64LegalizerInfo.cpp | 641 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; local
664 legalizeSmallCMGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, GISelChangeObserver &Observer) const argument
698 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; local
714 legalizeShlAshrLshr( MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, GISelChangeObserver &Observer) const argument
735 legalizeLoadStore( MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, GISelChangeObserver &Observer) const argument
[all...] |