| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFixupVectorISel.cpp | 176 unsigned IndexReg = 0; local
85 findSRegBaseAndIndex(MachineOperand *Op, unsigned &BaseReg, unsigned &IndexReg, MachineRegisterInfo &MRI, const SIRegisterInfo *TRI) argument
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86ATTInstPrinter.cpp | 389 const MCOperand &IndexReg = MI->getOperand(Op + X86::AddrIndexReg); local
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| H A D | X86IntelInstPrinter.cpp | 348 const MCOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); local
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| H A D | X86MCCodeEmitter.cpp | 377 const MCOperand &IndexReg = MI.getOperand(Op + X86::AddrIndexReg); local
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| H A D | X86MCTargetDesc.cpp | 532 const MCOperand &IndexReg = Inst.getOperand(MemOpStart + X86::AddrIndexReg); local
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InsertPrefetch.cpp | 83 Register IndexReg = MI.getOperand(Op + X86::AddrIndexReg).getReg(); local
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| H A D | X86AsmPrinter.cpp | 286 const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg); local
352 const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg); local
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| H A D | X86InstrBuilder.h | 54 unsigned IndexReg; member in struct:llvm::X86AddressMode
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| H A D | X86FixupLEAs.cpp | 369 Register IndexReg = Index.getReg(); local
549 Register IndexReg = Index.getReg(); local
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| H A D | X86SpeculativeLoadHardening.cpp | 1719 unsigned BaseReg = 0, IndexReg = 0; local
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| H A D | X86MCInstLower.cpp | 1062 unsigned Opc, BaseReg, ScaleVal, IndexReg, Displacement, SegmentReg; local
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| H A D | X86FastISel.cpp | 904 unsigned IndexReg = AM.IndexReg; local
3961 unsigned IndexReg = constrainOperandRegClass(Result->getDesc(), local
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| H A D | X86ISelDAGToDAG.cpp | 66 SDValue IndexReg; member in struct:__anon5459::X86ISelAddressMode
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| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/MC/MCParser/ |
| H A D | MCTargetAsmParser.h | 68 StringRef IndexReg; member in struct:llvm::IntelExpr
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86Operand.h | 63 unsigned IndexReg; member in struct:llvm::final::MemOp
649 CreateMem(unsigned ModeSize, unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, unsigned Scale, SMLoc StartLoc, SMLoc EndLoc, unsigned Size = 0, StringRef SymName = StringRef(), void *OpDecl = nullptr, unsigned FrontendSize = 0) argument
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| H A D | X86AsmParser.cpp | 345 unsigned BaseReg, IndexReg, TmpReg, Scale; member in class:__anon5411::X86AsmParser::IntelExprStateMachine
1043 CheckBaseRegAndIndexRegAndScale(unsigned BaseReg, unsigned IndexReg, unsigned Scale, bool Is64BitMode, StringRef &ErrMsg) argument
1408 CreateMemForInlineAsm( unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, unsigned Scale, SMLoc Start, SMLoc End, unsigned Size, StringRef Identifier, const InlineAsmIdentifierInfo &Info) argument
1971 unsigned IndexReg = SM.getIndexReg(); local
2294 unsigned BaseReg = 0, IndexReg = 0, Scale = 1; local
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 262 buildBrJT(Register TablePtr, unsigned JTI, Register IndexReg) argument
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 510 unsigned IndexReg = 0; local
659 unsigned IndexReg = 0; local
424 PPCSimplifyAddress(Address &Addr, bool &UseOffset, unsigned &IndexReg) argument
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 845 bool IndexReg; member in struct:AddressingMode
6949 Register IndexReg = MI.getOperand(3).getReg(); local
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