/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/ |
H A D | HexagonSubtarget.cpp | 41 HexagonSubtarget::HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS): argument
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H A D | HexagonTargetMachine.cpp | 64 HexagonTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/XCore/ |
H A D | XCoreSubtarget.cpp | 26 XCoreSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS) argument
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H A D | XCoreTargetMachine.cpp | 23 XCoreTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MSP430/ |
H A D | MSP430Subtarget.cpp | 26 MSP430Subtarget(const std::string &TT, const std::string &CPU, const std::string &FS) argument
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H A D | MSP430TargetMachine.cpp | 27 MSP430TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/NVPTX/ |
H A D | NVPTXSubtarget.cpp | 35 NVPTXSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool is64Bit) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Sparc/ |
H A D | SparcSubtarget.cpp | 26 SparcSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool is64Bit) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/ |
H A D | ARMSubtarget.cpp | 43 ARMSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS) argument
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H A D | ARMTargetMachine.cpp | 40 ARMBaseTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 56 ARMTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 82 ThumbTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CellSPU/ |
H A D | SPUSubtarget.cpp | 25 SPUSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS) argument
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H A D | SPUTargetMachine.cpp | 34 SPUTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CppBackend/ |
H A D | CPPTargetMachine.h | 25 CPPTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MBlaze/ |
H A D | MBlazeSubtarget.cpp | 26 MBlazeSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS) argument
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H A D | MBlazeTargetMachine.cpp | 35 MBlazeTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Mips/ |
H A D | MipsSubtarget.cpp | 27 MipsSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool little, Reloc::Model RM) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/NVPTX/MCTargetDesc/ |
H A D | NVPTXMCTargetDesc.cpp | 47 createNVPTXMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/ |
H A D | PPCSubtarget.cpp | 29 PPCSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool is64Bit) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Sparc/MCTargetDesc/ |
H A D | SparcMCTargetDesc.cpp | 46 createSparcMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
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/macosx-10.10.1/llvmCore-3425.0.34/include/llvm/Support/ |
H A D | Solaris.h | 23 #undef FS macro
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CellSPU/MCTargetDesc/ |
H A D | SPUMCTargetDesc.cpp | 47 createSPUMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCTargetDesc.cpp | 47 createHexagonMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/XCore/MCTargetDesc/ |
H A D | XCoreMCTargetDesc.cpp | 46 createXCoreMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/MC/ |
H A D | MCSubtargetInfo.cpp | 25 MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) { argument 37 MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS, argument 74 uint64_t MCSubtargetInfo::ToggleFeature(StringRef FS) { argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MSP430/MCTargetDesc/ |
H A D | MSP430MCTargetDesc.cpp | 46 createMSP430MCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
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