| /freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 49 HexagonSubtarget::HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS): argument
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| H A D | HexagonTargetMachine.cpp | 67 HexagonTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/XCore/ |
| H A D | XCoreSubtarget.cpp | 26 XCoreSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS) argument
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| H A D | XCoreTargetMachine.cpp | 23 XCoreTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/MSP430/ |
| H A D | MSP430Subtarget.cpp | 26 MSP430Subtarget(const std::string &TT, const std::string &CPU, const std::string &FS) argument
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| H A D | MSP430TargetMachine.cpp | 27 MSP430TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXSubtarget.cpp | 26 NVPTXSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool is64Bit) argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64Subtarget.cpp | 31 AArch64Subtarget::AArch64Subtarget(StringRef TT, StringRef CPU, StringRef FS) argument
38 initializeSubtargetFeatures(StringRef CPU, StringRef FS) argument
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| H A D | AArch64TargetMachine.cpp | 29 AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/CppBackend/ |
| H A D | CPPTargetMachine.h | 25 CPPTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcSubtarget.cpp | 27 SparcSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool is64Bit) argument
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| H A D | SparcTargetMachine.cpp | 28 SparcTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64bit) argument
85 SparcV8TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
97 SparcV9TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZSubtarget.cpp | 24 SystemZSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS) argument
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| H A D | SystemZTargetMachine.cpp | 22 SystemZTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCTargetDesc.cpp | 49 createHexagonMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
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| /freebsd-10-stable/contrib/llvm/include/llvm/Support/ |
| H A D | Solaris.h | 32 #undef FS macro
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| /freebsd-10-stable/contrib/llvm/lib/MC/ |
| H A D | MCSubtargetInfo.cpp | 25 MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) { argument
42 MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS, argument
79 uint64_t MCSubtargetInfo::ToggleFeature(StringRef FS) { argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430MCTargetDesc.cpp | 46 createMSP430MCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsSubtarget.cpp | 64 MipsSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool little, Reloc::Model _RM, MipsTargetMachine *_TM) argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/NVPTX/MCTargetDesc/ |
| H A D | NVPTXMCTargetDesc.cpp | 48 createNVPTXMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/R600/ |
| H A D | AMDGPUSubtarget.cpp | 24 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) : argument
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| H A D | AMDGPUTargetMachine.cpp | 52 AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OptLevel ) argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/XCore/MCTargetDesc/ |
| H A D | XCoreMCTargetDesc.cpp | 47 createXCoreMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
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| /freebsd-10-stable/contrib/llvm/tools/clang/lib/Analysis/ |
| H A D | FormatStringParsing.h | 51 T FS; member in class:clang::analyze_format_string::SpecifierResult
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| /freebsd-10-stable/contrib/llvm/lib/CodeGen/ |
| H A D | LLVMTargetMachine.cpp | 76 LLVMTargetMachine(const Target &T, StringRef Triple, StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|