| /macosx-10.9.5/llvmCore-3425.0.33/lib/MC/ |
| H A D | MCCodeGenInfo.cpp | 18 void MCCodeGenInfo::InitMCCodeGenInfo(Reloc::Model RM, CodeModel::Model CM, argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CppBackend/ |
| H A D | CPPTargetMachine.h | 25 CPPTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/NVPTX/MCTargetDesc/ |
| H A D | NVPTXMCTargetDesc.cpp | 54 createNVPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcMCTargetDesc.cpp | 53 createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CellSPU/MCTargetDesc/ |
| H A D | SPUMCTargetDesc.cpp | 65 createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCTargetDesc.cpp | 66 createHexagonMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MBlaze/ |
| H A D | MBlazeTargetMachine.cpp | 35 MBlazeTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MSP430/ |
| H A D | MSP430TargetMachine.cpp | 27 MSP430TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/XCore/MCTargetDesc/ |
| H A D | XCoreMCTargetDesc.cpp | 64 createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/XCore/ |
| H A D | XCoreTargetMachine.cpp | 23 XCoreTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/screen-22/screen/terminfo/ |
| H A D | checktc.c | 3 char *CL, *CM, *CS, *SR; variable
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
| H A D | ARMTargetMachine.cpp | 40 ARMBaseTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
56 ARMTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
82 ThumbTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CellSPU/ |
| H A D | SPUTargetMachine.cpp | 34 SPUTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Hexagon/ |
| H A D | HexagonTargetMachine.cpp | 64 HexagonTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430MCTargetDesc.cpp | 53 createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/ |
| H A D | MipsTargetMachine.cpp | 39 MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle) argument
62 MipsebTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
71 MipselTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/NVPTX/ |
| H A D | NVPTXTargetMachine.cpp | 63 NVPTXTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions& Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64bit) argument
83 NVPTXTargetMachine32(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
93 NVPTXTargetMachine64(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/ |
| H A D | PPCTargetMachine.cpp | 35 PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64Bit) argument
55 PPC32TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
65 PPC64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Sparc/ |
| H A D | SparcTargetMachine.cpp | 28 SparcTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64bit) argument
78 SparcV8TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
90 SparcV9TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/ |
| H A D | LLVMTargetMachine.cpp | 65 LLVMTargetMachine(const Target &T, StringRef Triple, StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MBlaze/MCTargetDesc/ |
| H A D | MBlazeMCTargetDesc.cpp | 64 createMBlazeMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCTargetDesc.cpp | 105 createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCMCTargetDesc.cpp | 79 createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ |
| H A D | TargetMachineC.cpp | 80 CodeModel::Model CM; local
|
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/ |
| H A D | X86TargetMachine.cpp | 33 X86_32TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
56 X86_64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
72 X86TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64Bit) argument
|