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| /freebsd-11-stable/sys/arm/arm/ | ||
| H A D | elf_machdep.c | diff 294727 Mon Jan 25 12:26:00 MST 2016 skra Fix an occasional undefined instruction abort during module loading. Even if data cache maintenance was done by IO code, the relocation fixup process creates dirty cache entries that we must write back before doing icache sync. Reported by: Thiagarajan Venkatasubramanian <tvenkata at juniper.net> Reviewed by: ian |
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