/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | DeadStoreElimination.cpp | 1615 auto CC = getLocForWriteEx(UseInst); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMConstantIslandPass.cpp | 1402 ARMCC::CondCodes CC = getITInstrPredicate(*MI, PredReg); local 1646 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(1).getImm(); local
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H A D | ARMFastISel.cpp | 1827 CCAssignFn *ARMFastISel::CCAssignFnForCall(CallingConv::ID CC, argument 1874 ProcessCallArgs(SmallVectorImpl<Value*> &Args, SmallVectorImpl<Register> &ArgRegs, SmallVectorImpl<MVT> &ArgVTs, SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, SmallVectorImpl<Register> &RegArgs, CallingConv::ID CC, unsigned &NumBytes, bool isVarArg) argument 2021 FinishCall(MVT RetVT, SmallVectorImpl<Register> &UsedRegs, const Instruction *I, CallingConv::ID CC, unsigned &NumBytes, bool isVarArg) argument 2095 CallingConv::ID CC = F.getCallingConv(); local 2202 CallingConv::ID CC = TLI.getLibcallCallingConv(Call); local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRISelLowering.cpp | 421 static AVRCC::CondCodes intCCToAVRCC(ISD::CondCode CC) { argument 442 SDValue AVRTargetLowering::getAVRCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, argument 620 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get(); local 638 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get(); local 653 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); local 1624 AVRCC::CondCodes CC = (AVRCC::CondCodes)MI.getOperand(3).getImm(); local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 801 static LPCC::CondCode IntCondCCodeToICC(SDValue CC, const SDLoc &DL, argument 874 LPCC::CondCode CC = IntCondCCodeToICC(Cond, DL, RHS, DAG); local 975 LPCC::CondCode CC = IntCondCCodeToICC(Cond, DL, RHS, DAG); local 992 LPCC::CondCode CC = IntCondCCodeToICC(Cond, DL, RHS, DAG); local 1347 isConditionalZeroOrAllOnes(SDNode *N, bool AllOnes, SDValue &CC, bool &Invert, SDValue &OtherOp, SelectionDAG &DAG) argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 1129 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get(); local 1161 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); local 1224 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get(); local 1041 EmitCMP(SDValue &LHS, SDValue &RHS, SDValue &TargetCC, ISD::CondCode CC, const SDLoc &dl, SelectionDAG &DAG) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsFastISel.cpp | 1140 CallingConv::ID CC = CLI.CallConv; local 1279 CallingConv::ID CC = CLI.CallConv; local 1326 CallingConv::ID CC = F->getCallingConv(); local 1494 CallingConv::ID CC = CLI.CallConv; local 1692 CallingConv::ID CC = F.getCallingConv(); local [all...] |
H A D | MipsSEISelLowering.cpp | 950 static bool isLegalDSPCondCode(EVT Ty, ISD::CondCode CC) { argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 1494 CallingConv::ID CC = CLI.CallConv; local 1553 CallingConv::ID CC = CLI.CallConv; local 1377 processCallArgs(SmallVectorImpl<Value*> &Args, SmallVectorImpl<unsigned> &ArgRegs, SmallVectorImpl<MVT> &ArgVTs, SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, SmallVectorImpl<unsigned> &RegArgs, CallingConv::ID CC, unsigned &NumBytes, bool IsVarArg) argument 1699 CallingConv::ID CC = F.getCallingConv(); local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
H A D | DwarfUnit.cpp | 989 uint8_t CC = 0; local 1255 unsigned CC = 0; local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.cpp | 328 AArch64CC::CondCode CC = (AArch64CC::CondCode)(int)Cond[0].getImm(); local 582 AArch64CC::CondCode CC; local 1373 getUsedNZCV(AArch64CC::CondCode CC) argument 1463 AArch64CC::CondCode CC = findCondCodeUsedByInstr(Instr); local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600ISelLowering.cpp | 955 SDValue CC = Op.getOperand(4); local 1559 CCAssignFnForCall(CallingConv::ID CC, bool IsVarArg) const argument [all...] |
H A D | SIRegisterInfo.cpp | 96 CallingConv::ID CC = MF->getFunction().getCallingConv(); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
H A D | AMDGPUBaseInfo.cpp | 926 bool isEntryFunctionCC(CallingConv::ID CC) { argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/VE/AsmParser/ |
H A D | VEAsmParser.cpp | 202 struct CCOp CC; member in union:__anon4344::VEOperand::__anon4345
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 1623 const SDValue &CC = Op->getOperand(2); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86AsmBackend.cpp | 334 X86::CondCode CC = getCondFromBranch(MI, MCII); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 2062 handleMaskRegisterForCallingConv(unsigned NumElts, CallingConv::ID CC, argument 2095 getRegisterTypeForCallingConv(LLVMContext &Context, CallingConv::ID CC, EVT VT) const argument 2113 getNumRegistersForCallingConv(LLVMContext &Context, CallingConv::ID CC, EVT VT) const argument 2131 getVectorTypeBreakdownForCallingConv( LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT, unsigned &NumIntermediates, MVT &RegisterVT) const argument 2342 markLibCallAttributes(MachineFunction *MF, unsigned CC, ArgListTy &Args) const argument 3127 canGuaranteeTCO(CallingConv::ID CC) argument 3134 mayTailCallThisCC(CallingConv::ID CC) argument 3155 shouldGuaranteeTCO(CallingConv::ID CC, bool GuaranteedTailCallOpt) argument [all...] |
H A D | X86InstructionSelector.cpp | 943 X86::CondCode CC; local 1058 X86::CondCode CC; local
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | DebugInfoMetadata.h | 1100 uint8_t CC; member in class:llvm::DISubroutineType 1102 DISubroutineType(LLVMContext &C, StorageType Storage, DIFlags Flags, uint8_t CC, ArrayRef<Metadata *> Ops) argument 1109 getImpl(LLVMContext &Context, DIFlags Flags, uint8_t CC, DITypeRefArray TypeArray, StorageType Storage, bool ShouldCreate = true) argument [all...] |
/freebsd-13-stable/contrib/llvm-project/clang/lib/AST/ |
H A D | ItaniumMangle.cpp | 2841 StringRef CXXNameMangler::getCallingConvQualifierName(CallingConv CC) { argument
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H A D | MicrosoftMangle.cpp | 2162 CallingConv CC = T->getCallConv(); local 2357 void MicrosoftCXXNameMangler::mangleCallingConvention(CallingConv CC) { argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/IR/ |
H A D | AutoUpgrade.cpp | 1367 upgradeMaskedCompare(IRBuilder< &Builder, CallInst &CI, unsigned CC, bool Signed) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineAndOrXor.cpp | 27 static unsigned getFCmpCode(FCmpInst::Predicate CC) { argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | DependenceAnalysis.cpp | 383 setLine(const SCEV *AA, const SCEV *BB, const SCEV *CC, const Loop *CurLoop) argument
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