Searched defs:RM (Results 1 - 25 of 59) sorted by path

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/freebsd-9.3-release/contrib/bmake/mk/
H A Dautodep.mk73 RM?= rm macro
[all...]
H A Down.mk26 RM?= rm macro
H A Dyacc.mk22 RM?= rm macro
/freebsd-9.3-release/contrib/ipfilter/BSD/
H A DMakefile41 RM=/bin/rm macro
[all...]
/freebsd-9.3-release/contrib/ipfilter/
H A DMakefile122 RM=/bin/rm macro
/freebsd-9.3-release/contrib/llvm/include/llvm/ExecutionEngine/
H A DExecutionEngine.h603 EngineBuilder &setRelocationModel(Reloc::Model RM) { argument
/freebsd-9.3-release/contrib/llvm/include/llvm/Support/
H A DTargetRegistry.h288 MCCodeGenInfo *createMCCodeGenInfo(StringRef Triple, Reloc::Model RM, argument
1063 Allocator(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
/freebsd-9.3-release/contrib/llvm/lib/CodeGen/
H A DLLVMTargetMachine.cpp76 LLVMTargetMachine(const Target &T, StringRef Triple, StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
H A DLiveRangeEdit.cpp117 bool LiveRangeEdit::canRematerializeAt(Remat &RM, argument
147 rematerializeAt(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, const Remat &RM, const TargetRegisterInfo &tri, bool Late) argument
[all...]
H A DMachineVerifier.cpp167 bool addRequired(const RegMap &RM) { argument
/freebsd-9.3-release/contrib/llvm/lib/ExecutionEngine/
H A DExecutionEngine.cpp414 createJIT(Module *M, std::string *ErrorStr, JITMemoryManager *JMM, CodeGenOpt::Level OL, bool GVsWithCode, Reloc::Model RM, CodeModel::Model CMM) argument
/freebsd-9.3-release/contrib/llvm/lib/MC/
H A DMCCodeGenInfo.cpp18 void MCCodeGenInfo::InitMCCodeGenInfo(Reloc::Model RM, CodeModel::Model CM, argument
/freebsd-9.3-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64TargetMachine.cpp29 AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
/freebsd-9.3-release/contrib/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp72 static MCCodeGenInfo *createAArch64MCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
/freebsd-9.3-release/contrib/llvm/lib/Target/ARM/
H A DARMTargetMachine.cpp45 ARMBaseTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
70 ARMTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
96 ThumbTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
/freebsd-9.3-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCTargetDesc.cpp224 static MCCodeGenInfo *createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
/freebsd-9.3-release/contrib/llvm/lib/Target/CppBackend/
H A DCPPTargetMachine.h25 CPPTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
/freebsd-9.3-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonTargetMachine.cpp67 HexagonTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
/freebsd-9.3-release/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCTargetDesc.cpp69 static MCCodeGenInfo *createHexagonMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
/freebsd-9.3-release/contrib/llvm/lib/Target/MSP430/MCTargetDesc/
H A DMSP430MCTargetDesc.cpp53 static MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
/freebsd-9.3-release/contrib/llvm/lib/Target/MSP430/
H A DMSP430TargetMachine.cpp27 MSP430TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
/freebsd-9.3-release/contrib/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsMCTargetDesc.cpp110 static MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM, argument
/freebsd-9.3-release/contrib/llvm/lib/Target/Mips/
H A DMipsAsmPrinter.cpp621 Reloc::Model RM = Subtarget->getRelocationModel(); local
679 Reloc::Model RM = Subtarget.getRelocationModel(); local
H A DMipsSubtarget.h125 Reloc::Model RM; member in class:llvm::MipsSubtarget
H A DMipsTargetMachine.cpp56 MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle) argument
118 MipsebTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
127 MipselTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument

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