1249259Sdim//===-- AArch64TargetMachine.cpp - Define TargetMachine for AArch64 -------===// 2249259Sdim// 3249259Sdim// The LLVM Compiler Infrastructure 4249259Sdim// 5249259Sdim// This file is distributed under the University of Illinois Open Source 6249259Sdim// License. See LICENSE.TXT for details. 7249259Sdim// 8249259Sdim//===----------------------------------------------------------------------===// 9249259Sdim// 10249259Sdim// This file contains the implementation of the AArch64TargetMachine 11249259Sdim// methods. Principally just setting up the passes needed to generate correct 12249259Sdim// code on this architecture. 13249259Sdim// 14249259Sdim//===----------------------------------------------------------------------===// 15249259Sdim 16249259Sdim#include "AArch64.h" 17249259Sdim#include "AArch64TargetMachine.h" 18249259Sdim#include "MCTargetDesc/AArch64MCTargetDesc.h" 19249259Sdim#include "llvm/PassManager.h" 20249259Sdim#include "llvm/CodeGen/Passes.h" 21249259Sdim#include "llvm/Support/TargetRegistry.h" 22249259Sdim 23249259Sdimusing namespace llvm; 24249259Sdim 25249259Sdimextern "C" void LLVMInitializeAArch64Target() { 26249259Sdim RegisterTargetMachine<AArch64TargetMachine> X(TheAArch64Target); 27249259Sdim} 28249259Sdim 29249259SdimAArch64TargetMachine::AArch64TargetMachine(const Target &T, StringRef TT, 30249259Sdim StringRef CPU, StringRef FS, 31249259Sdim const TargetOptions &Options, 32249259Sdim Reloc::Model RM, CodeModel::Model CM, 33249259Sdim CodeGenOpt::Level OL) 34249259Sdim : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 35249259Sdim Subtarget(TT, CPU, FS), 36249259Sdim InstrInfo(Subtarget), 37249259Sdim DL("e-p:64:64-i64:64:64-i128:128:128-s0:32:32-f128:128:128-n32:64-S128"), 38249259Sdim TLInfo(*this), 39249259Sdim TSInfo(*this), 40249259Sdim FrameLowering(Subtarget) { 41263509Sdim initAsmInfo(); 42249259Sdim} 43249259Sdim 44249259Sdimnamespace { 45249259Sdim/// AArch64 Code Generator Pass Configuration Options. 46249259Sdimclass AArch64PassConfig : public TargetPassConfig { 47249259Sdimpublic: 48249259Sdim AArch64PassConfig(AArch64TargetMachine *TM, PassManagerBase &PM) 49249259Sdim : TargetPassConfig(TM, PM) {} 50249259Sdim 51249259Sdim AArch64TargetMachine &getAArch64TargetMachine() const { 52249259Sdim return getTM<AArch64TargetMachine>(); 53249259Sdim } 54249259Sdim 55249259Sdim const AArch64Subtarget &getAArch64Subtarget() const { 56249259Sdim return *getAArch64TargetMachine().getSubtargetImpl(); 57249259Sdim } 58249259Sdim 59249259Sdim virtual bool addInstSelector(); 60249259Sdim virtual bool addPreEmitPass(); 61249259Sdim}; 62249259Sdim} // namespace 63249259Sdim 64249259SdimTargetPassConfig *AArch64TargetMachine::createPassConfig(PassManagerBase &PM) { 65249259Sdim return new AArch64PassConfig(this, PM); 66249259Sdim} 67249259Sdim 68249259Sdimbool AArch64PassConfig::addPreEmitPass() { 69249259Sdim addPass(&UnpackMachineBundlesID); 70249259Sdim addPass(createAArch64BranchFixupPass()); 71249259Sdim return true; 72249259Sdim} 73249259Sdim 74249259Sdimbool AArch64PassConfig::addInstSelector() { 75249259Sdim addPass(createAArch64ISelDAG(getAArch64TargetMachine(), getOptLevel())); 76249259Sdim 77249259Sdim // For ELF, cleanup any local-dynamic TLS accesses. 78249259Sdim if (getAArch64Subtarget().isTargetELF() && getOptLevel() != CodeGenOpt::None) 79249259Sdim addPass(createAArch64CleanupLocalDynamicTLSPass()); 80249259Sdim 81249259Sdim return false; 82249259Sdim} 83