nand/raw/nand_base.c

16  *	rework for 2K page size chips
19  *	Enable cached programming for 2k page size chips
51 /* Define default oob placement schemes for large and small page devices */
319 	int page, res = 0, i = 0;
326 	page = (int)(ofs >> chip->page_shift) & chip->pagemask;
331 					chip->badblockpos & 0xFE, page);
339 					page);
348 		page = (int)(ofs >> chip->page_shift) & chip->pagemask;
382 	/* Write to first/last page(s) if necessary */
587  * @page_addr: the page address for this command, -1 if none
589  * Send command to NAND device. This function is used for small page devices
590  * (512 Bytes per page).
686  * nand_command_lp - [DEFAULT] Send command to NAND large page device
690  * @page_addr: the page address for this command, -1 if none
692  * Send command to NAND device. This is the version for the new large page
693  * devices. We don't have the separate regions as we have in the small page
1074  * @page: page to read
1075  * @offset_in_page: offset within the page
1084 int nand_read_page_op(struct nand_chip *chip, unsigned int page,
1095 	chip->cmdfunc(mtd, NAND_CMD_READ0, offset_in_page, page);
1106  * @page: parameter page to read
1115 static int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf,
1125 	chip->cmdfunc(mtd, NAND_CMD_PARAM, page, -1);
1135  * @offset_in_page: offset within the page
1168  * @page: page to read
1178 int nand_read_oob_op(struct nand_chip *chip, unsigned int page,
1189 	chip->cmdfunc(mtd, NAND_CMD_READOOB, offset_in_oob, page);
1200  * @page: page to write
1201  * @offset_in_page: offset within the page
1202  * @buf: buffer containing the data to write to the page
1210 int nand_prog_page_begin_op(struct nand_chip *chip, unsigned int page,
1222 	chip->cmdfunc(mtd, NAND_CMD_SEQIN, offset_in_page, page);
1258  * @page: page to write
1259  * @offset_in_page: offset within the page
1260  * @buf: buffer containing the data to write to the page
1268 int nand_prog_page_op(struct nand_chip *chip, unsigned int page,
1281 	chip->cmdfunc(mtd, NAND_CMD_SEQIN, offset_in_page, page);
1296  * @offset_in_page: offset within the page
1417 	unsigned int page = eraseblock <<
1421 	chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
1685  *    different from the NAND page size. When fixing bitflips, ECC engines will
1687  *    expect you to return the maximum number of bitflips for the whole page.
1689  *    not on the whole page. After checking each chunk you should update your
1744  * nand_read_page_raw - [INTERN] read raw page data without ecc
1749  * @page: page number to read
1754 			      uint8_t *buf, int oob_required, int page)
1773  * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
1778  * @page: page number to read
1784 				       int oob_required, int page)
1834  * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
1839  * @page: page number to read
1842 				uint8_t *buf, int oob_required, int page)
1853 	chip->ecc.read_page_raw(mtd, chip, buf, 1, page);
1879  * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
1882  * @data_offs: offset of requested data within the page
1885  * @page: page number to read
1889 			int page)
1901 	/* Column address within the page aligned to ECC size (256bytes) */
1912 	/* If we read not a page aligned data */
1991  * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
1996  * @page: page number to read
2001 				uint8_t *buf, int oob_required, int page)
2062  * @page: page number to read
2064  * Hardware ECC for large page chips, require OOB to be read first. For this
2071 	struct nand_chip *chip, uint8_t *buf, int oob_required, int page)
2084 	ret = nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
2088 	ret = nand_read_page_op(chip, page, 0, NULL, 0);
2127  * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
2132  * @page: page number to read
2138 				   uint8_t *buf, int oob_required, int page)
2268  * when there are too many bitflips in a page (i.e., ECC error). After setting
2269  * a new threshold, the host should retry reading the page.
2297 	int chipnr, page, realpage, col, bytes, aligned, oob_required;
2314 	page = realpage & chip->pagemask;
2337 		/* Is the current page in the buffer? */
2347 				ret = nand_read_page_op(chip, page, 0, NULL, 0);
2353 			 * Now read the page into the buffer.  Absent an error,
2359 							      page);
2364 							page);
2367 							  oob_required, page);
2370 					/* Invalidate page cache */
2385 					/* Invalidate page cache */
2447 		/* For subsequent reads align to page boundary */
2449 		/* Increment page address */
2452 		page = realpage & chip->pagemask;
2454 		if (!page) {
2479  * @page: page number to read
2482 			     int page)
2484 	return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
2492  * @page: page number to read
2495 				  int page)
2503 	ret = nand_read_page_op(chip, page, chip->ecc.size, NULL, 0);
2517 				ret = nand_read_page_op(chip, page, pos, NULL,
2546  * @page: page number to write
2549 			      int page)
2551 	return nand_prog_page_op(chip, page, mtd->writesize, chip->oob_poi,
2557  *			     with syndrome - only for large page flash
2560  * @page: page number to write
2563 				   struct nand_chip *chip, int page)
2581 	ret = nand_prog_page_begin_op(chip, page, pos, NULL, 0);
2640 	int page, realpage, chipnr;
2673 	/* Shift to get page */
2675 	page = realpage & chip->pagemask;
2681 			ret = chip->ecc.read_oob_raw(mtd, chip, page);
2683 			ret = chip->ecc.read_oob(mtd, chip, page);
2703 		/* Increment page address */
2706 		page = realpage & chip->pagemask;
2708 		if (!page) {
2773  * nand_write_page_raw - [INTERN] raw page write function
2778  * @page: page number to write
2783 			       const uint8_t *buf, int oob_required, int page)
2802  * nand_write_page_raw_syndrome - [INTERN] raw page write function
2807  * @page: page number to write
2814 					int page)
2863  * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
2868  * @page: page number to write
2872 				 int page)
2888 	return chip->ecc.write_page_raw(mtd, chip, buf, 1, page);
2892  * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
2897  * @page: page number to write
2901 				  int page)
2936  * @offset:	column address of subpage within the page
2940  * @page: page number to write
2945 				int oob_required, int page)
2984 	/* copy calculated ECC for whole page to chip->buffer->oob */
3000  * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
3005  * @page: page number to write
3013 				    int page)
3068  * nand_write_page - [REPLACEABLE] write one page
3071  * @offset: address offset within the page
3075  * @page: page number to write
3080 		int oob_required, int page, int raw)
3091 		status = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
3098 						  oob_required, page);
3101 						 buf, oob_required, page);
3104 					      page);
3184 	int chipnr, realpage, page, column;
3200 	/* Reject writes, which are not page aligned */
3202 		pr_notice("%s: attempt to write non page aligned data\n",
3219 	page = realpage & chip->pagemask;
3221 	/* Invalidate the page cache, when we write to the cached page */
3247 		/* Partial page write?, or need to use bounce buffer */
3268 					oob_required, page,
3281 		page = realpage & chip->pagemask;
3283 		if (!page) {
3345 	int chipnr, page, status, len;
3353 	/* Do not allow write past end of page */
3355 		pr_debug("%s: attempt to write past end of page\n",
3380 	 * of my DiskOnChip 2000 test units) will clear the whole data page too
3388 	/* Shift to get page */
3389 	page = (int)(to >> chip->page_shift);
3397 	/* Invalidate the page cache, if we write to the cached page */
3398 	if (page == chip->pagebuf)
3404 		status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask);
3406 		status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);
3463  * @page: the page address of the block which will be erased
3467 static int single_erase(struct mtd_info *mtd, int page)
3473 	eraseblock = page >> (chip->phys_erase_shift - chip->page_shift);
3501 	int page, status, pages_per_block, ret, chipnr;
3515 	/* Shift to get first page */
3516 	page = (int)(instr->addr >> chip->page_shift);
3542 		if (!instr->scrub && nand_block_checkbad(mtd, ((loff_t) page) <<
3544 			pr_warn("%s: attempt to erase a bad block at page 0x%08x\n",
3545 				    __func__, page);
3548 				((loff_t)page << chip->page_shift);
3553 		 * Invalidate the page cache, if we erase the block which
3554 		 * contains the current cached page.
3556 		if (page <= chip->pagebuf && chip->pagebuf <
3557 		    (page + pages_per_block))
3560 		status = chip->erase(mtd, page & chip->pagemask);
3564 			pr_debug("%s: failed erase, page 0x%08x\n",
3565 					__func__, page);
3568 				((loff_t)page << chip->page_shift);
3572 		/* Increment page address and decrement length */
3574 		page += pages_per_block;
3577 		if (len && !(page & chip->pagemask)) {
3887 		pr_err("Could not find valid ONFI parameter page; aborting\n");
3951 			pr_warn("Failed to detect ONFI extended param page\n");
3995 		pr_err("Could not find valid JEDEC parameter page; aborting\n");
4194 	/* All legacy ID NAND are small-page, SLC */
4201  * page size, cell-type information).
4394 	/* Calculate the address shift from the page size */
4442 	pr_info("%d MiB, %s, erase size: %d KiB, page size: %d, OOB size: %d\n",
4716 	/* number of correctable bits the chip requires in a page */
4870 	 * We get the number of corrected bits per page to compare
4888 	 * controller driver implements all the page accessors because
4919 		pr_err("Invalid ECC page accessors setup\n");
4931 	/* Set the internal oob buffer location, just after the page data */
4979 		/* Use standard hwecc read page function? */
5006 		/* Use standard syndrome read/write page function? */
5027 		pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n",
5064 		 * to 4 bits for large page devices.
5120 	 * Set the number of read / write steps for one page depending on ECC
5151 	/* Large page NAND with SOFT_ECC should support subpage reads */