Lines Matching refs:ck
27 uint32_t ck;
35 ck = get_sdram_clk_rate();
42 writel((ck / dram->trp) & 0x0000000F, &emc->t_rp);
43 writel((ck / dram->tras) & 0x0000000F, &emc->t_ras);
44 writel((ck / dram->tsrex) & 0x0000007F, &emc->t_srex);
45 writel((ck / dram->twr) & 0x0000000F, &emc->t_wr);
46 writel((ck / dram->trc) & 0x0000001F, &emc->t_rc);
47 writel((ck / dram->trfc) & 0x0000001F, &emc->t_rfc);
48 writel((ck / dram->txsr) & 0x000000FF, &emc->t_xsr);
53 writel((((ck / dram->refresh) >> 4) & 0x7FF), &emc->refresh);
55 /* Force all clocks, enable inverted ck, issue NOP command */
60 /* Fast dynamic refresh for at least a few SDRAM ck cycles */
64 writel((((ck / dram->refresh) >> 4) & 0x7FF), &emc->refresh);