dev/tc/zs_ioasic.c

228 	struct zs_chanstate *cs;
245 			cs = &zs_ioasic_conschanstate_store;
248 			cs = malloc(sizeof(struct zs_chanstate),
251 			cs->cs_reg_csr = (volatile void *)&zc->zc_csr;
253 			memcpy(cs->cs_creg, zs_ioasic_init_reg, 16);
254 			memcpy(cs->cs_preg, zs_ioasic_init_reg, 16);
256 			cs->cs_defcflag = zs_def_cflag;
257 			cs->cs_defspeed = 9600;		/* XXX */
258 			(void)zs_set_modes(cs, cs->cs_defcflag);
261 		zs->zsc_cs[channel] = cs;
263 		cs->cs_channel = channel;
264 		cs->cs_ops = &zsops_null;
265 		cs->cs_brg_clk = PCLK / 16;
274 			cs->cs_creg[15] |= ZSWR15_DCD_IE;
275 			cs->cs_preg[15] |= ZSWR15_DCD_IE;
281 		cs->cs_private = (void *)zflg;
289 			zs_write_reg(cs, 9, 0);
298 			cs->cs_ctl_chan = zs->zsc_cs[0];
300 			cs->cs_ctl_chan = NULL;
330 			zs_write_reg(cs, 9, reset);
436 zs_set_speed(struct zs_chanstate *cs, int bps)
444 	if (cs->cs_brg_clk == 0)
448 	tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
453 	real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
461 	cs->cs_preg[12] = tconst;
462 	cs->cs_preg[13] = tconst >> 8;
469 zs_set_modes(struct zs_chanstate *cs, int cflag)
471 	u_long privflags = (u_long)cs->cs_private;
482 	cs->cs_rr0_pps = 0;
484 		cs->cs_rr0_dcd = 0;
486 			cs->cs_rr0_pps = ZSRR0_DCD;
488 		cs->cs_rr0_dcd = ZSRR0_DCD;
490 		cs->cs_wr5_dtr = ZSWR5_DTR;
491 		cs->cs_wr5_rts = ZSWR5_RTS;
492 		cs->cs_rr0_cts = ZSRR0_CTS;
495 		cs->cs_wr5_dtr = 0;
496 		cs->cs_wr5_rts = ZSWR5_DTR;
497 		cs->cs_rr0_cts = ZSRR0_CTS;
500 		cs->cs_wr5_dtr = 0;
501 		cs->cs_wr5_rts = ZSWR5_DTR;
502 		cs->cs_rr0_cts = ZSRR0_DCD;
504 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
505 		cs->cs_wr5_rts = 0;
506 		cs->cs_rr0_cts = 0;
510 		cs->cs_rr0_dcd &= ~(ZSRR0_CTS|ZSRR0_DCD);
511 		cs->cs_rr0_cts &= ~(ZSRR0_CTS|ZSRR0_DCD);
514 		cs->cs_wr5_dtr &= ~(ZSWR5_RTS|ZSWR5_DTR);
515 		cs->cs_wr5_rts &= ~(ZSWR5_RTS|ZSWR5_DTR);
532 zs_read_reg(struct zs_chanstate *cs, uint8_t reg)
534 	volatile struct zshan *zc = (volatile void *)cs->cs_reg_csr;
547 zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)
549 	volatile struct zshan *zc = (volatile void *)cs->cs_reg_csr;
560 zs_read_csr(struct zs_chanstate *cs)
562 	volatile struct zshan *zc = (volatile void *)cs->cs_reg_csr;
572 zs_write_csr(struct zs_chanstate *cs, uint8_t val)
574 	volatile struct zshan *zc = (volatile void *)cs->cs_reg_csr;
582 zs_read_data(struct zs_chanstate *cs)
584 	volatile struct zshan *zc = (volatile void *)cs->cs_reg_csr;
594 zs_write_data(struct zs_chanstate *cs, uint8_t val)
596 	volatile struct zshan *zc = (volatile void *)cs->cs_reg_csr;
611 zs_abort(struct zs_chanstate *cs)
618 		rr0 = zs_read_csr(cs);
632 zs_getc(struct zs_chanstate *cs)
640 		rr0 = zs_read_csr(cs);
643 	c = zs_read_data(cs);
657 zs_putc(struct zs_chanstate *cs, int c)
665 		rr0 = zs_read_csr(cs);
668 	zs_write_data(cs, c);
672 		rr0 = zs_read_csr(cs);
687 	struct zs_chanstate *cs;
702 	cs = &zs_ioasic_conschanstate_store;
714 	cs->cs_reg_csr = (volatile void *)&zc->zc_csr;
716 	cs->cs_channel = channel;
717 	cs->cs_ops = &zsops_null;
718 	cs->cs_brg_clk = PCLK / 16;
721 	memcpy(cs->cs_preg, zs_ioasic_init_reg, 16);
722 	/* cs->cs_preg[5] |= (ZSWR5_DTR | ZSWR5_RTS); */
736 	cs->cs_private = (void *)zflg;
739 	zs_write_reg(cs, 9, 0);
742 	zs_write_reg(cs, 9, ZSWR9_HARD_RESET);
745 	zs_loadchannelregs(cs);
755 	struct zs_chanstate *cs = &zs_ioasic_conschanstate_store;
758 	cs->cs_defspeed = 9600;
759 	cs->cs_defcflag = (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8;
777 	struct zs_chanstate *cs = &zs_ioasic_conschanstate_store;
780 	cs->cs_defspeed = 4800;
781 	cs->cs_defcflag = (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8;
782 	return (zskbd_cnattach(cs));