Lines Matching refs:temp
222 u32 temp;
224 temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
226 temp |= SDVO_ENABLE;
228 temp |= HDMI_AUDIO_ENABLE;
230 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
256 u32 temp;
258 temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
260 temp |= SDVO_ENABLE;
262 temp |= HDMI_AUDIO_ENABLE;
268 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
270 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
283 temp & ~SDVO_ENABLE);
290 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
292 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
311 u32 temp;
313 temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
315 temp |= SDVO_ENABLE;
317 temp |= HDMI_AUDIO_ENABLE;
333 temp &= ~SDVO_COLOR_FORMAT_MASK;
334 temp |= SDVO_COLOR_FORMAT_8bpc;
337 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
341 temp &= ~SDVO_COLOR_FORMAT_MASK;
342 temp |= HDMI_COLOR_FORMAT_12bpc;
344 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
379 u32 temp;
381 temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
383 temp &= ~(SDVO_ENABLE | HDMI_AUDIO_ENABLE);
384 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
400 temp &= ~SDVO_PIPE_SEL_MASK;
401 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
406 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
408 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
411 temp &= ~SDVO_ENABLE;
412 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);