Lines Matching refs:STB_FPGA_BASE_ADDRESS
127 #define STB_XILINX_LED (STB_FPGA_BASE_ADDRESS+ 0x0100)
128 #define STB_XILINX1_REG0 (STB_FPGA_BASE_ADDRESS+ 0x40000)
129 #define STB_XILINX1_REG1 (STB_FPGA_BASE_ADDRESS+ 0x40002)
130 #define STB_XILINX1_REG2 (STB_FPGA_BASE_ADDRESS+ 0x40004)
131 #define STB_XILINX1_REG3 (STB_FPGA_BASE_ADDRESS+ 0x40006)
132 #define STB_XILINX1_REG4 (STB_FPGA_BASE_ADDRESS+ 0x40008)
133 #define STB_XILINX1_REG5 (STB_FPGA_BASE_ADDRESS+ 0x4000A)
134 #define STB_XILINX1_REG6 (STB_FPGA_BASE_ADDRESS+ 0x4000C)
135 #define STB_XILINX1_ID (STB_FPGA_BASE_ADDRESS+ 0x4000E)
136 #define STB_XILINX1_FLUSH (STB_FPGA_BASE_ADDRESS+ 0x4000E)
137 #define STB_XILINX2_REG0 (STB_FPGA_BASE_ADDRESS+ 0x80000)
138 #define STB_XILINX2_REG1 (STB_FPGA_BASE_ADDRESS+ 0x80002)
139 #define STB_XILINX2_REG2 (STB_FPGA_BASE_ADDRESS+ 0x80004)