Lines Matching refs:INTC_INT_HIGH_LEVEL
60 { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
61 { AU1000_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
62 { AU1000_UART2_INT, INTC_INT_HIGH_LEVEL, 0},
63 { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
64 { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0},
65 { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0},
66 { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
67 { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0},
68 { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0},
69 { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0},
70 { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0},
71 { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0},
72 { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0},
73 { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0},
82 { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0},
83 { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0},
84 { AU1000_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
88 { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
89 { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
94 { AU1500_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
97 { AU1500_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
100 { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
101 { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0},
102 { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0},
103 { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0},
104 { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0},
105 { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0},
106 { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0},
107 { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0},
116 { AU1000_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
120 { AU1500_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
121 { AU1500_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
126 { AU1100_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
127 { AU1100_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
128 { AU1100_SD_INT, INTC_INT_HIGH_LEVEL, 0},
129 { AU1100_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
130 { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0},
131 { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0},
132 { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
133 { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0},
134 { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0},
135 { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0},
136 { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0},
137 { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0},
138 { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0},
139 { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0},
148 { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0},
149 { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0},
150 { AU1000_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
154 { AU1100_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
155 /*{ AU1000_GPIO215_208_INT, INTC_INT_HIGH_LEVEL, 0},*/
156 { AU1100_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
161 { AU1550_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
164 { AU1550_DDMA_INT, INTC_INT_HIGH_LEVEL, 0},
165 { AU1550_CRYPTO_INT, INTC_INT_HIGH_LEVEL, 0},
169 { AU1550_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
170 { AU1550_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
171 { AU1550_PSC0_INT, INTC_INT_HIGH_LEVEL, 0},
172 { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
173 { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0},
174 { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0},
184 { AU1550_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
187 { AU1550_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
188 { AU1550_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
192 { AU1200_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
194 { AU1200_SD_INT, INTC_INT_HIGH_LEVEL, 0},
195 { AU1200_DDMA_INT, INTC_INT_HIGH_LEVEL, 0},
196 { AU1200_MAE_BE_INT, INTC_INT_HIGH_LEVEL, 0 },
197 { AU1200_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
198 { AU1200_MAE_FE_INT, INTC_INT_HIGH_LEVEL, 0 },
199 { AU1200_PSC0_INT, INTC_INT_HIGH_LEVEL, 0},
200 { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
201 { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0},
202 { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0},
212 { AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 },
213 { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
214 { AU1200_MAE_BOTH_INT, INTC_INT_HIGH_LEVEL, 0},