Lines Matching refs:r17
103 shr.u r17=r16,61 // get the region number into r17
116 cmp.eq p6,p7=5,r17 // is IFA pointing into to region 5?
119 (p7) dep r17=r17,r19,(PAGE_SHIFT-3),3 // put region number bits in place
128 (p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5
129 (p7) dep r17=r18,r17,3,(PAGE_SHIFT-6) // r17=pgd_offset for region[0-4]
137 ld8 r17=[r17] // get *pgd (may be 0)
139 (p7) cmp.eq p6,p7=r17,r0 // was pgd_present(*pgd) == NULL?
141 dep r28=r28,r17,3,(PAGE_SHIFT-3) // r28=pud_offset(pgd,addr)
147 dep r17=r18,r29,3,(PAGE_SHIFT-3) // r17=pmd_offset(pud,addr)
149 dep r17=r18,r17,3,(PAGE_SHIFT-3) // r17=pmd_offset(pgd,addr)
152 (p7) ld8 r20=[r17] // get *pmd (may be 0)
198 * r17 = equivalent of pmd_offset(pud, ifa)
206 ld8 r26=[r17] // read *pmd again
243 mov r17=cr.iha // get virtual address of PTE
246 1: ld8 r18=[r17] // read *pte
261 ld8 r19=[r17] // read *pte again and see if same
287 mov r17=cr.iha // get virtual address of PTE
290 1: ld8 r18=[r17] // read *pte
305 ld8 r19=[r17] // read *pte again and see if same
322 movl r17=PAGE_KERNEL
332 (p8) thash r17=r16
334 (p8) mov cr.iha=r17
344 or r19=r17,r19 // insert PTE control bits into r19
360 movl r17=PAGE_KERNEL
372 (p8) thash r17=r16
374 (p8) mov cr.iha=r17
396 (p12) dep r17=-1,r17,4,1 // set ma=UC for region 6 addr
401 or r19=r19,r17 // insert PTE control bits into r19
428 * Output: r17: physical address of PTE of faulting address
440 shr.u r17=r16,61 // get the region number into r17
443 cmp.eq p6,p7=5,r17 // is faulting address in region 5?
449 (p7) dep r17=r17,r19,(PAGE_SHIFT-3),3 // put region number bits in place
458 (p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5
459 (p7) dep r17=r18,r17,3,(PAGE_SHIFT-6) // r17=pgd_offset for region[0-4]
467 ld8 r17=[r17] // get *pgd (may be 0)
469 (p7) cmp.eq p6,p7=r17,r0 // was pgd_present(*pgd) == NULL?
470 dep r17=r18,r17,3,(PAGE_SHIFT-3) // r17=p[u|m]d_offset(pgd,addr)
473 (p7) ld8 r17=[r17] // get *pud (may be 0)
476 (p7) cmp.eq.or.andcm p6,p7=r17,r0 // was pud_present(*pud) == NULL?
477 dep r17=r18,r17,3,(PAGE_SHIFT-3) // r17=pmd_offset(pud,addr)
480 (p7) ld8 r17=[r17] // get *pmd (may be 0)
483 (p7) cmp.eq.or.andcm p6,p7=r17,r0 // was pmd_present(*pmd) == NULL?
484 dep r17=r19,r17,3,(PAGE_SHIFT-3) // r17=pte_offset(pmd,addr);
550 thash r17=r16 // compute virtual address of L3 PTE
556 1: ld8 r18=[r17]
562 (p6) cmpxchg8.acq r26=[r17],r25,ar.ccv // Only update if page is present
575 ld8 r18=[r17] // read PTE again
584 1: ld8 r18=[r17]
589 st8 [r17]=r18 // store back updated PTE
609 mov r17=cr.ipsr
612 tbit.z p6,p0=r17,IA64_PSR_IS_BIT // IA64 instruction set?
617 thash r17=r16 // compute virtual address of L3 PTE
622 1: ld8 r18=[r17]
628 (p6) cmpxchg8.acq r26=[r17],r25,ar.ccv // Only if page present
641 ld8 r18=[r17] // read PTE again
650 1: ld8 r18=[r17]
655 st8 [r17]=r18 // store back updated PTE
671 thash r17=r16 // compute virtual address of L3 PTE
677 1: ld8 r18=[r17]
683 (p6) cmpxchg8.acq r26=[r17],r25,ar.ccv // Only if page is present
695 ld8 r18=[r17] // read PTE again
703 1: ld8 r18=[r17]
707 st8 [r17]=r18 // store back updated PTE
739 mov r17=cr.iim // M2 (2 cyc)
759 cmp.eq p0,p7=r18,r17 // I0 is this a system call?
774 ld1.bias r17=[r16] // M0|1 r17 = current->thread.on_ustack flag
809 cmp.eq pKStk,pUStk=r0,r17 // A were we on kernel stacks already?
941 add r17=PT(R11),r1 // initialize second base pointer
947 st8.spill [r17]=r11,PT(CR_IIP)-PT(R11) // save r11
953 st8 [r17]=r28,PT(AR_UNAT)-PT(CR_IIP) // save cr.iip
957 st8 [r17]=r25,PT(AR_RSC)-PT(AR_UNAT) // save ar.unat
966 st8 [r17]=r27,PT(AR_BSPSTORE)-PT(AR_RSC)// save ar.rsc
976 (pKStk) adds r17=PT(B0)-PT(AR_BSPSTORE),r17 // skip over ar_bspstore field
984 (pUStk) st8 [r17]=r23,PT(B0)-PT(AR_BSPSTORE) // save ar.bspstore
988 st8 [r17]=r28,PT(R1)-PT(B0) // save b0
992 st8.spill [r17]=r20,PT(R13)-PT(R1) // save original r1
997 .mem.offset 8,0; st8.spill [r17]=r13,PT(R15)-PT(R13) // save r13
1008 st8.spill [r17]=r15 // save r15
1020 movl r17=FPSR_DEFAULT
1022 mov.m ar.fpsr=r17 // set ar.fpsr to kernel default value
1206 mov r17=PAGE_SHIFT<<2
1208 ptc.l r16,r17
1289 mov r17=cr.isr
1292 and r18=0xf,r17 // r18 = cr.ipsr.code{3:0}
1293 tbit.z p6,p0=r17,IA64_ISR_NA_BIT
1326 mov r17=cr.iip
1334 add r17=r17,r18 // now add the offset
1336 mov cr.iip=r17
1483 extr.u r17=r16,16,8 // get ISR.code
1487 cmp.ne p6,p0=2,r17
1491 extr.u r17=r16,18,1 // get the eflags.ac bit
1493 cmp.eq p6,p0=0,r17