Lines Matching refs:tile
688 | 128 [tile 0] [tile 1]
691 4 128 [tile 2] [tile 3]
694 128 [tile 4] [tile 5]
697 v 96 [tile 6] [tile 7]
703 DMA hardware is fooled into thinking the screen is only one tile
708 framebuffer as a continuous virtual memory. The GBE tile table is
709 set up so that each tile references one of these 64k blocks:
711 GBE -> tile list framebuffer TLB <------------ CPU
712 [ tile 0 ] -> [ 64KB ] <- [ 16x 4KB page entries ] ^
714 [ tile n ] -> [ 64KB ] <- [ 16x 4KB page entries ] v
719 Thus the GBE hardware will scan the first tile, filing the first 64k
721 tile, until the whole screen is covered.
742 /* tile_ptr -> [ tile 1 ] -> FB mem */
743 /* [ tile 2 ] -> FB mem */
907 /* Check the mode can be mapped linearly with the tile table trick. */
991 u16 *tile;
1006 /* look for the starting tile */
1007 tile = &gbe_tiles.cpu[offset >> TILE_SHIFT];
1011 /* remap each tile separately */
1013 phys_addr = (((unsigned long) (*tile)) << TILE_SHIFT) + offset;
1026 tile++;