Lines Matching refs:fir_base
132 void (*set_for_speed)(int fir_base, u32 speed);
133 int (*probe)(int fir_base);
191 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base);
192 static void smsc_ircc_setup_io(struct smsc_ircc_cb *self, unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq);
247 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed);
248 static int smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base);
249 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed);
250 static int smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base);
251 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed);
252 static int smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base);
495 static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq)
503 err = smsc_ircc_present(fir_base, sir_base);
538 dev->base_addr = self->io.fir_base = fir_base;
574 smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq);
617 release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
624 * Function smsc_ircc_present(fir_base, sir_base)
629 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base)
633 if (!request_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT,
635 IRDA_WARNING("%s: can't get fir_base of 0x%03x\n",
636 __FUNCTION__, fir_base);
647 register_bank(fir_base, 3);
649 high = inb(fir_base + IRCC_ID_HIGH);
650 low = inb(fir_base + IRCC_ID_LOW);
651 chip = inb(fir_base + IRCC_CHIP_ID);
652 version = inb(fir_base + IRCC_VERSION);
653 config = inb(fir_base + IRCC_INTERFACE);
659 __FUNCTION__, fir_base);
664 chip & 0x0f, version, fir_base, sir_base, dma, irq);
671 release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
677 * Function smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq)
683 unsigned int fir_base, unsigned int sir_base,
688 register_bank(fir_base, 3);
689 config = inb(fir_base + IRCC_INTERFACE);
693 self->io.fir_base = fir_base;
745 int iobase = self->io.fir_base;
943 int fir_base, ir_mode, ctrl, fast;
946 fir_base = self->io.fir_base;
976 register_bank(fir_base, 0);
977 outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast, fir_base + IRCC_LCR_A);
980 register_bank(fir_base, 1);
981 outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | ir_mode), fir_base + IRCC_SCE_CFGA);
983 register_bank(fir_base, 4);
984 outb((inb(fir_base + IRCC_CONTROL) & 0x30) | ctrl, fir_base + IRCC_CONTROL);
996 int fir_base;
1004 fir_base = self->io.fir_base;
1012 outb(inb(fir_base + IRCC_LCR_A) | IRCC_LCR_A_FIFO_RESET, fir_base + IRCC_LCR_A);
1015 /*outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, fir_base + IRCC_IER);*/
1017 register_bank(fir_base, 1);
1021 outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
1022 fir_base + IRCC_SCE_CFGB);
1024 outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
1025 fir_base + IRCC_SCE_CFGB);
1027 (void) inb(fir_base + IRCC_FIFO_THRESHOLD);
1030 outb(0, fir_base + IRCC_MASTER);
1031 register_bank(fir_base, 0);
1032 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, fir_base + IRCC_IER);
1033 outb(IRCC_MASTER_INT_EN, fir_base + IRCC_MASTER);
1044 int fir_base;
1050 fir_base = self->io.fir_base;
1051 register_bank(fir_base, 0);
1052 /*outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);*/
1053 outb(inb(fir_base + IRCC_LCR_B) & IRCC_LCR_B_SIP_ENABLE, fir_base + IRCC_LCR_B);
1253 int iobase = self->io.fir_base;
1306 int iobase = self->io.fir_base;
1346 int iobase = self->io.fir_base;
1397 int iobase = self->io.fir_base;
1517 iobase = self->io.fir_base;
1641 int iobase = self->io.fir_base;
1688 sprintf(hwname, "SMSC @ 0x%03x", self->io.fir_base);
1819 self->io.fir_base);
1821 release_region(self->io.fir_base, self->io.fir_ext);
1867 int fir_base, sir_base;
1876 fir_base = self->io.fir_base;
1880 outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);
1886 register_bank(fir_base, 1);
1887 outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | IRCC_CFGA_IRDA_SIR_A), fir_base + IRCC_SCE_CFGA);
1898 outb(0x00, fir_base + IRCC_MASTER);
2031 if (smsc_transceivers[i].probe(self->io.fir_base)) {
2057 smsc_transceivers[trx - 1].set_for_speed(self->io.fir_base, speed);
2878 * Function smsc_ircc_set_transceiver_smsc_ircc_atc(fir_base, speed)
2884 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed)
2893 register_bank(fir_base, 4);
2894 outb((inb(fir_base + IRCC_ATC) & IRCC_ATC_MASK) | IRCC_ATC_nPROGREADY|IRCC_ATC_ENABLE,
2895 fir_base + IRCC_ATC);
2897 while ((val = (inb(fir_base + IRCC_ATC) & IRCC_ATC_nPROGREADY)) &&
2903 inb(fir_base + IRCC_ATC));
2907 * Function smsc_ircc_probe_transceiver_smsc_ircc_atc(fir_base)
2913 static int smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base)
2925 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed)
2939 register_bank(fir_base, 0);
2940 outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2944 * Function smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(fir_base)
2950 static int smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base)
2956 * Function smsc_ircc_set_transceiver_toshiba_sat1800(fir_base, speed)
2962 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed)
2978 register_bank(fir_base, 0);
2979 outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2983 * Function smsc_ircc_probe_transceiver_toshiba_sat1800(fir_base)
2989 static int smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base)