Lines Matching refs:ichdev
345 struct ichdev {
388 struct ichdev ichd[6];
663 static void snd_intel8x0_setup_periods(struct intel8x0 *chip, struct ichdev *ichdev)
666 u32 *bdbar = ichdev->bdbar;
667 unsigned long port = ichdev->reg_offset;
669 iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr);
670 if (ichdev->size == ichdev->fragsize) {
671 ichdev->ack_reload = ichdev->ack = 2;
672 ichdev->fragsize1 = ichdev->fragsize >> 1;
674 bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf);
676 ichdev->fragsize1 >> ichdev->pos_shift);
677 bdbar[idx + 2] = cpu_to_le32(ichdev->physbuf + (ichdev->size >> 1));
679 ichdev->fragsize1 >> ichdev->pos_shift);
681 ichdev->frags = 2;
683 ichdev->ack_reload = ichdev->ack = 1;
684 ichdev->fragsize1 = ichdev->fragsize;
686 bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf +
687 (((idx >> 1) * ichdev->fragsize) %
688 ichdev->size));
690 ichdev->fragsize >> ichdev->pos_shift);
692 ichdev->frags = ichdev->size / ichdev->fragsize;
694 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi = ICH_REG_LVI_MASK);
695 ichdev->civ = 0;
697 ichdev->lvi_frag = ICH_REG_LVI_MASK % ichdev->frags;
698 ichdev->position = 0;
700 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);
720 static inline void snd_intel8x0_update(struct intel8x0 *chip, struct ichdev *ichdev)
722 unsigned long port = ichdev->reg_offset;
728 status = igetbyte(chip, port + ichdev->roff_sr);
732 } else if (civ == ichdev->civ) {
735 ichdev->civ++;
736 ichdev->civ &= ICH_REG_LVI_MASK;
738 step = civ - ichdev->civ;
742 // snd_printd("step = %d, %d -> %d\n", step, ichdev->civ, civ);
743 ichdev->civ = civ;
746 ichdev->position += step * ichdev->fragsize1;
748 ichdev->position %= ichdev->size;
749 ichdev->lvi += step;
750 ichdev->lvi &= ICH_REG_LVI_MASK;
751 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi);
753 ichdev->lvi_frag++;
754 ichdev->lvi_frag %= ichdev->frags;
755 ichdev->bdbar[ichdev->lvi * 2] = cpu_to_le32(ichdev->physbuf + ichdev->lvi_frag * ichdev->fragsize1);
756 if (--ichdev->ack == 0) {
757 ichdev->ack = ichdev->ack_reload;
762 if (ack && ichdev->substream) {
763 snd_pcm_period_elapsed(ichdev->substream);
765 iputbyte(chip, port + ichdev->roff_sr,
772 struct ichdev *ichdev;
791 ichdev = &chip->ichd[i];
792 if (status & ichdev->int_sta_mask)
793 snd_intel8x0_update(chip, ichdev);
809 struct ichdev *ichdev = get_ichdev(substream);
811 unsigned long port = ichdev->reg_offset;
815 ichdev->suspended = 0;
820 ichdev->last_pos = ichdev->position;
823 ichdev->suspended = 1;
837 while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ;
847 struct ichdev *ichdev = get_ichdev(substream);
848 unsigned long port = ichdev->reg_offset;
857 ichdev->suspended = 0;
863 fifo = igetdword(chip, fiforeg[ichdev->ali_slot / 4]);
864 fifo &= ~(0xff << (ichdev->ali_slot % 4));
865 fifo |= 0x83 << (ichdev->ali_slot % 4);
866 iputdword(chip, fiforeg[ichdev->ali_slot / 4], fifo);
869 val &= ~(1 << (ichdev->ali_slot + 16)); /* clear PAUSE flag */
871 iputdword(chip, ICHREG(ALI_DMACR), val | (1 << ichdev->ali_slot));
874 ichdev->suspended = 1;
879 iputdword(chip, ICHREG(ALI_DMACR), val | (1 << (ichdev->ali_slot + 16)));
891 igetdword(chip, ICHREG(ALI_INTERRUPTSR)) & ichdev->int_sta_mask);
903 struct ichdev *ichdev = get_ichdev(substream);
908 if (chip->fix_nocache && ichdev->page_attr_changed) {
910 ichdev->page_attr_changed = 0;
916 if (runtime->dma_area && ! ichdev->page_attr_changed) {
918 ichdev->page_attr_changed = 1;
921 if (ichdev->pcm_open_flag) {
922 snd_ac97_pcm_close(ichdev->pcm);
923 ichdev->pcm_open_flag = 0;
925 err = snd_ac97_pcm_open(ichdev->pcm, params_rate(hw_params),
927 ichdev->pcm->r[dbl].slots);
929 ichdev->pcm_open_flag = 1;
931 if (ichdev->ichd == ICHD_PCMOUT && chip->spdif_idx < 0)
932 snd_ac97_set_rate(ichdev->pcm->r[0].codec[0], AC97_SPDIF,
941 struct ichdev *ichdev = get_ichdev(substream);
943 if (ichdev->pcm_open_flag) {
944 snd_ac97_pcm_close(ichdev->pcm);
945 ichdev->pcm_open_flag = 0;
947 if (chip->fix_nocache && ichdev->page_attr_changed) {
949 ichdev->page_attr_changed = 0;
1013 struct ichdev *ichdev = get_ichdev(substream);
1015 ichdev->physbuf = runtime->dma_addr;
1016 ichdev->size = snd_pcm_lib_buffer_bytes(substream);
1017 ichdev->fragsize = snd_pcm_lib_period_bytes(substream);
1018 if (ichdev->ichd == ICHD_PCMOUT) {
1021 ichdev->pos_shift = (runtime->sample_bits > 16) ? 2 : 1;
1023 snd_intel8x0_setup_periods(chip, ichdev);
1030 struct ichdev *ichdev = get_ichdev(substream);
1037 civ = igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV);
1038 ptr1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb);
1039 position = ichdev->position;
1044 if (civ == igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV) &&
1045 ptr1 == igetword(chip, ichdev->reg_offset + ichdev->roff_picb))
1048 ptr = ichdev->last_pos;
1050 ptr1 <<= ichdev->pos_shift;
1051 ptr = ichdev->fragsize1 - ptr1;
1053 if (ptr < ichdev->last_pos) {
1055 pos_base = position / ichdev->fragsize1;
1056 last_base = ichdev->last_pos / ichdev->fragsize1;
1061 ptr = ichdev->last_pos;
1064 ichdev->last_pos = ptr;
1066 if (ptr >= ichdev->size)
1122 static int snd_intel8x0_pcm_open(struct snd_pcm_substream *substream, struct ichdev *ichdev)
1128 ichdev->substream = substream;
1130 runtime->hw.rates = ichdev->pcm->rates;
1138 runtime->private_data = ichdev;
2511 struct ichdev *ichdev = &chip->ichd[i];
2512 if (ichdev->substream && ichdev->page_attr_changed) {
2513 struct snd_pcm_runtime *runtime = ichdev->substream->runtime;
2583 struct ichdev *ichdev = &chip->ichd[i];
2584 if (ichdev->substream && ichdev->page_attr_changed) {
2585 struct snd_pcm_runtime *runtime = ichdev->substream->runtime;
2594 struct ichdev *ichdev = &chip->ichd[i];
2595 unsigned long port = ichdev->reg_offset;
2596 if (! ichdev->substream || ! ichdev->suspended)
2598 if (ichdev->ichd == ICHD_PCMOUT)
2599 snd_intel8x0_setup_pcm_out(chip, ichdev->substream->runtime);
2600 iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr);
2601 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi);
2602 iputbyte(chip, port + ICH_REG_OFF_CIV, ichdev->civ);
2603 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);
2616 struct ichdev *ichdev;
2631 ichdev = &chip->ichd[ICHD_PCMOUT];
2632 ichdev->physbuf = subs->dma_buffer.addr;
2633 ichdev->size = ichdev->fragsize = INTEL8X0_TESTBUF_SIZE;
2634 ichdev->substream = NULL; /* don't process interrupts */
2641 snd_intel8x0_setup_periods(chip, ichdev);
2642 port = ichdev->reg_offset;
2650 iputdword(chip, ICHREG(ALI_DMACR), 1 << ichdev->ali_slot);
2658 civ = igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV);
2659 pos1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb);
2664 if (civ == igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV) &&
2665 pos1 == igetword(chip, ichdev->reg_offset + ichdev->roff_picb))
2671 pos = ichdev->fragsize1;
2672 pos -= pos1 << ichdev->pos_shift;
2673 pos += ichdev->position;
2679 iputdword(chip, ICHREG(ALI_DMACR), 1 << (ichdev->ali_slot + 16));
2685 while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH))
2827 struct ichdev *ichdev;
2936 ichdev = &chip->ichd[i];
2937 ichdev->ichd = i;
2938 ichdev->reg_offset = tbl[i].offset;
2939 ichdev->int_sta_mask = tbl[i].int_sta_mask;
2942 ichdev->roff_sr = ICH_REG_OFF_PICB;
2943 ichdev->roff_picb = ICH_REG_OFF_SR;
2945 ichdev->roff_sr = ICH_REG_OFF_SR;
2946 ichdev->roff_picb = ICH_REG_OFF_PICB;
2949 ichdev->ali_slot = (ichdev->reg_offset - 0x40) / 0x10;
2951 ichdev->pos_shift = (device_type == DEVICE_SIS) ? 0 : 1;
2969 ichdev = &chip->ichd[i];
2970 ichdev->bdbar = ((u32 *)chip->bdbars.area) +
2972 ichdev->bdbar_addr = chip->bdbars.addr +
2974 int_sta_masks |= ichdev->int_sta_mask;