Lines Matching refs:isp1362_hcd
117 * When called from the interrupthandler only isp1362_hcd->irqenb is modified,
118 * since the interrupt handler will write isp1362_hcd->irqenb to HCuPINT upon
123 static inline void isp1362_enable_int(struct isp1362_hcd *isp1362_hcd, u16 mask)
125 if ((isp1362_hcd->irqenb | mask) == isp1362_hcd->irqenb)
127 if (mask & ~isp1362_hcd->irqenb)
128 isp1362_write_reg16(isp1362_hcd, HCuPINT, mask & ~isp1362_hcd->irqenb);
129 isp1362_hcd->irqenb |= mask;
130 if (isp1362_hcd->irq_active)
132 isp1362_write_reg16(isp1362_hcd, HCuPINTENB, isp1362_hcd->irqenb);
137 static inline struct isp1362_ep_queue *get_ptd_queue(struct isp1362_hcd *isp1362_hcd,
142 if (offset < isp1362_hcd->istl_queue[1].buf_start)
143 epq = &isp1362_hcd->istl_queue[0];
144 else if (offset < isp1362_hcd->intl_queue.buf_start)
145 epq = &isp1362_hcd->istl_queue[1];
146 else if (offset < isp1362_hcd->atl_queue.buf_start)
147 epq = &isp1362_hcd->intl_queue;
148 else if (offset < isp1362_hcd->atl_queue.buf_start +
149 isp1362_hcd->atl_queue.buf_size)
150 epq = &isp1362_hcd->atl_queue;
266 static void prepare_ptd(struct isp1362_hcd *isp1362_hcd, struct urb *urb,
351 static void isp1362_write_ptd(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep,
360 isp1362_write_buffer(isp1362_hcd, ptd, ep->ptd_offset, PTD_HEADER_SIZE);
362 isp1362_write_buffer(isp1362_hcd, ep->data,
369 static void isp1362_read_ptd(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep,
382 isp1362_read_buffer(isp1362_hcd, ptd, ep->ptd_offset, PTD_HEADER_SIZE);
396 isp1362_read_buffer(isp1362_hcd, ep->data,
406 static void remove_ptd(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep)
415 epq = get_ptd_queue(isp1362_hcd, ep->ptd_offset);
420 list_add_tail(&ep->remove_list, &isp1362_hcd->remove_list);
422 isp1362_enable_int(isp1362_hcd, HCuPINT_SOF);
434 if (epq == &isp1362_hcd->atl_queue) {
436 isp1362_read_reg32(isp1362_hcd, HCATLSKIP), epq->skip_map);
437 isp1362_write_reg32(isp1362_hcd, HCATLSKIP, epq->skip_map);
439 isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE);
440 } else if (epq == &isp1362_hcd->intl_queue) {
442 isp1362_read_reg32(isp1362_hcd, HCINTLSKIP), epq->skip_map);
443 isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, epq->skip_map);
445 isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_INTL_ACTIVE);
453 static void finish_request(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep,
455 __releases(isp1362_hcd->lock)
456 __acquires(isp1362_hcd->lock)
477 usb_hcd_unlink_urb_from_ep(isp1362_hcd_to_hcd(isp1362_hcd), urb);
478 spin_unlock(&isp1362_hcd->lock);
479 usb_hcd_giveback_urb(isp1362_hcd_to_hcd(isp1362_hcd), urb, status);
480 spin_lock(&isp1362_hcd->lock);
497 isp1362_hcd->load[ep->branch],
498 isp1362_hcd->load[ep->branch] - ep->load);
499 isp1362_hcd->load[ep->branch] -= ep->load;
507 static void postproc_ep(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep *ep)
657 finish_request(isp1362_hcd, ep, urb, urbstat);
661 static void finish_unlinks(struct isp1362_hcd *isp1362_hcd)
666 list_for_each_entry_safe(ep, tmp, &isp1362_hcd->remove_list, remove_list) {
668 get_ptd_queue(isp1362_hcd, ep->ptd_offset);
682 finish_request(isp1362_hcd, ep, urb, -ESHUTDOWN);
695 static inline void enable_atl_transfers(struct isp1362_hcd *isp1362_hcd, int count)
698 if (count < isp1362_hcd->atl_queue.ptd_count)
699 isp1362_write_reg16(isp1362_hcd, HCATLDTC, count);
700 isp1362_enable_int(isp1362_hcd, HCuPINT_ATL);
701 isp1362_write_reg32(isp1362_hcd, HCATLSKIP, isp1362_hcd->atl_queue.skip_map);
702 isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE);
704 isp1362_enable_int(isp1362_hcd, HCuPINT_SOF);
707 static inline void enable_intl_transfers(struct isp1362_hcd *isp1362_hcd)
709 isp1362_enable_int(isp1362_hcd, HCuPINT_INTL);
710 isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_INTL_ACTIVE);
711 isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, isp1362_hcd->intl_queue.skip_map);
714 static inline void enable_istl_transfers(struct isp1362_hcd *isp1362_hcd, int flip)
716 isp1362_enable_int(isp1362_hcd, flip ? HCuPINT_ISTL1 : HCuPINT_ISTL0);
717 isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, flip ?
721 static int submit_req(struct isp1362_hcd *isp1362_hcd, struct urb *urb,
726 prepare_ptd(isp1362_hcd, urb, ep, epq, 0);
744 isp1362_write_ptd(isp1362_hcd, ep, epq);
750 static void start_atl_transfers(struct isp1362_hcd *isp1362_hcd)
753 struct isp1362_ep_queue *epq = &isp1362_hcd->atl_queue;
762 list_for_each_entry(ep, &isp1362_hcd->async, schedule) {
774 ret = submit_req(isp1362_hcd, urb, ep, epq);
789 if (isp1362_hcd->async.next != isp1362_hcd->async.prev) {
791 list_move(&isp1362_hcd->async, isp1362_hcd->async.next);
794 enable_atl_transfers(isp1362_hcd, defer ? 0 : ptd_count);
803 static void start_intl_transfers(struct isp1362_hcd *isp1362_hcd)
806 struct isp1362_ep_queue *epq = &isp1362_hcd->intl_queue;
814 list_for_each_entry(ep, &isp1362_hcd->periodic, schedule) {
826 ret = submit_req(isp1362_hcd, urb, ep, epq);
841 enable_intl_transfers(isp1362_hcd);
864 static void start_iso_transfers(struct isp1362_hcd *isp1362_hcd)
867 int flip = isp1362_hcd->istl_flip;
872 u16 fno = isp1362_read_reg32(isp1362_hcd, HCFMNUM);
875 epq = &isp1362_hcd->istl_queue[flip];
885 list_for_each_entry_safe(ep, tmp, &isp1362_hcd->isoc, schedule) {
893 finish_request(isp1362_hcd, ep, urb, -EOVERFLOW);
903 prepare_ptd(isp1362_hcd, urb, ep, epq, fno);
924 isp1362_write_ptd(isp1362_hcd, ep, epq);
929 enable_istl_transfers(isp1362_hcd, flip);
936 if (!(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) &
945 static void finish_transfers(struct isp1362_hcd *isp1362_hcd, unsigned long done_map,
967 isp1362_read_ptd(isp1362_hcd, ep, epq);
980 postproc_ep(isp1362_hcd, ep);
991 static void finish_iso_transfers(struct isp1362_hcd *isp1362_hcd, struct isp1362_ep_queue *epq)
1007 isp1362_read_ptd(isp1362_hcd, ep, epq);
1009 postproc_ep(isp1362_hcd, ep);
1018 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1022 spin_lock(&isp1362_hcd->lock);
1024 BUG_ON(isp1362_hcd->irq_active++);
1026 isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0);
1028 irqstat = isp1362_read_reg16(isp1362_hcd, HCuPINT);
1029 DBG(3, "%s: got IRQ %04x:%04x\n", __func__, irqstat, isp1362_hcd->irqenb);
1032 irqstat &= isp1362_hcd->irqenb;
1033 isp1362_write_reg16(isp1362_hcd, HCuPINT, irqstat);
1037 isp1362_hcd->irqenb &= ~HCuPINT_SOF;
1038 isp1362_hcd->irq_stat[ISP1362_INT_SOF]++;
1042 isp1362_hcd->fmindex = isp1362_read_reg32(isp1362_hcd, HCFMNUM);
1043 if (!list_empty(&isp1362_hcd->remove_list))
1044 finish_unlinks(isp1362_hcd);
1045 if (!list_empty(&isp1362_hcd->async) && !(irqstat & HCuPINT_ATL)) {
1046 if (list_empty(&isp1362_hcd->atl_queue.active)) {
1047 start_atl_transfers(isp1362_hcd);
1049 isp1362_enable_int(isp1362_hcd, HCuPINT_ATL);
1050 isp1362_write_reg32(isp1362_hcd, HCATLSKIP,
1051 isp1362_hcd->atl_queue.skip_map);
1052 isp1362_set_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE);
1058 isp1362_hcd->irq_stat[ISP1362_INT_ISTL0]++;
1061 isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ISTL0_FULL);
1063 WARN_ON((int)!!isp1362_hcd->istl_flip);
1064 WARN_ON(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) &
1066 WARN_ON(!(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) &
1068 isp1362_hcd->irqenb &= ~HCuPINT_ISTL0;
1072 isp1362_hcd->irq_stat[ISP1362_INT_ISTL1]++;
1075 isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ISTL1_FULL);
1077 WARN_ON(!(int)isp1362_hcd->istl_flip);
1078 WARN_ON(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) &
1080 WARN_ON(!(isp1362_read_reg16(isp1362_hcd, HCBUFSTAT) &
1082 isp1362_hcd->irqenb &= ~HCuPINT_ISTL1;
1088 finish_iso_transfers(isp1362_hcd,
1089 &isp1362_hcd->istl_queue[isp1362_hcd->istl_flip]);
1090 start_iso_transfers(isp1362_hcd);
1091 isp1362_hcd->istl_flip = 1 - isp1362_hcd->istl_flip;
1095 u32 done_map = isp1362_read_reg32(isp1362_hcd, HCINTLDONE);
1096 u32 skip_map = isp1362_read_reg32(isp1362_hcd, HCINTLSKIP);
1097 isp1362_hcd->irq_stat[ISP1362_INT_INTL]++;
1103 isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, skip_map | done_map);
1106 isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_INTL_ACTIVE);
1112 finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->intl_queue);
1113 start_intl_transfers(isp1362_hcd);
1118 u32 done_map = isp1362_read_reg32(isp1362_hcd, HCATLDONE);
1119 u32 skip_map = isp1362_read_reg32(isp1362_hcd, HCATLSKIP);
1120 isp1362_hcd->irq_stat[ISP1362_INT_ATL]++;
1126 isp1362_write_reg32(isp1362_hcd, HCATLSKIP, skip_map | done_map);
1128 isp1362_clr_mask16(isp1362_hcd, HCBUFSTAT, HCBUFSTAT_ATL_ACTIVE);
1131 finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->atl_queue);
1132 start_atl_transfers(isp1362_hcd);
1138 u32 intstat = isp1362_read_reg32(isp1362_hcd, HCINTSTAT);
1139 isp1362_hcd->irq_stat[ISP1362_INT_OPR]++;
1142 DBG(2, "%s: OPR %08x:%08x\n", __func__, intstat, isp1362_hcd->intenb);
1143 intstat &= isp1362_hcd->intenb;
1148 isp1362_hcd->rhstatus = isp1362_read_reg32(isp1362_hcd, HCRHSTATUS);
1149 isp1362_hcd->rhport[0] = isp1362_read_reg32(isp1362_hcd, HCRHPORT1);
1150 isp1362_hcd->rhport[1] = isp1362_read_reg32(isp1362_hcd, HCRHPORT2);
1154 isp1362_show_reg(isp1362_hcd, HCCONTROL);
1157 isp1362_write_reg32(isp1362_hcd, HCINTSTAT, intstat);
1163 isp1362_hcd->irq_stat[ISP1362_INT_SUSP]++;
1171 isp1362_hcd->irq_stat[ISP1362_INT_CLKRDY]++;
1173 isp1362_hcd->irqenb &= ~HCuPINT_CLKRDY;
1181 isp1362_write_reg16(isp1362_hcd, HCuPINTENB, isp1362_hcd->irqenb);
1182 isp1362_hcd->irq_active--;
1183 spin_unlock(&isp1362_hcd->lock);
1191 static int balance(struct isp1362_hcd *isp1362_hcd, u16 interval, u16 load)
1199 if (branch < 0 || isp1362_hcd->load[branch] > isp1362_hcd->load[i]) {
1203 if ((isp1362_hcd->load[j] + load) > MAX_PERIODIC_LOAD) {
1205 load, j, isp1362_hcd->load[j], MAX_PERIODIC_LOAD);
1217 /* NB! ALL the code above this point runs with isp1362_hcd->lock
1227 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1263 spin_lock_irqsave(&isp1362_hcd->lock, flags);
1266 if (!((isp1362_hcd->rhport[0] | isp1362_hcd->rhport[1]) &
1315 ep->num_req = isp1362_hcd->req_serial++;
1324 list_add_tail(&ep->schedule, &isp1362_hcd->async);
1335 retval = balance(isp1362_hcd, ep->interval, ep->load);
1342 isp1362_hcd->fmindex = isp1362_read_reg32(isp1362_hcd, HCFMNUM);
1344 __func__, isp1362_hcd->fmindex, ep->branch,
1345 ((isp1362_hcd->fmindex + PERIODIC_SIZE - 1) &
1347 (isp1362_hcd->fmindex & (PERIODIC_SIZE - 1)) + ep->branch);
1351 u16 frame = isp1362_hcd->fmindex;
1356 if (frame_before(frame, isp1362_hcd->fmindex))
1361 list_add_tail(&ep->schedule, &isp1362_hcd->isoc);
1364 list_add_tail(&ep->schedule, &isp1362_hcd->periodic);
1370 ep->load / ep->interval, isp1362_hcd->load[ep->branch],
1371 isp1362_hcd->load[ep->branch] + ep->load);
1372 isp1362_hcd->load[ep->branch] += ep->load;
1376 ALIGNSTAT(isp1362_hcd, urb->transfer_buffer);
1381 start_atl_transfers(isp1362_hcd);
1384 start_intl_transfers(isp1362_hcd);
1387 start_iso_transfers(isp1362_hcd);
1398 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1406 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1414 spin_lock_irqsave(&isp1362_hcd->lock, flags);
1422 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1434 remove_ptd(isp1362_hcd, ep);
1441 finish_request(isp1362_hcd, ep, urb, status);
1449 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1459 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1465 spin_lock_irqsave(&isp1362_hcd->lock, flags);
1470 remove_ptd(isp1362_hcd, ep);
1474 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1488 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1492 spin_lock_irqsave(&isp1362_hcd->lock, flags);
1493 fmnum = isp1362_read_reg32(isp1362_hcd, HCFMNUM);
1494 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1504 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1516 ports = isp1362_hcd->rhdesca & RH_A_NDP;
1519 spin_lock_irqsave(&isp1362_hcd->lock, flags);
1521 if (isp1362_hcd->rhstatus & (RH_HS_LPSC | RH_HS_OCIC))
1527 u32 status = isp1362_hcd->rhport[i];
1539 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1543 static void isp1362_hub_descriptor(struct isp1362_hcd *isp1362_hcd,
1546 u32 reg = isp1362_hcd->rhdesca;
1569 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1573 int ports = isp1362_hcd->rhdesca & RH_A_NDP;
1582 spin_lock_irqsave(&isp1362_hcd->lock, flags);
1583 isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_OCIC);
1584 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1605 isp1362_hub_descriptor(isp1362_hcd, (struct usb_hub_descriptor *)buf);
1617 tmp = isp1362_hcd->rhport[--wIndex];
1664 spin_lock_irqsave(&isp1362_hcd->lock, flags);
1665 isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, tmp);
1666 isp1362_hcd->rhport[wIndex] =
1667 isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex);
1668 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1685 spin_lock_irqsave(&isp1362_hcd->lock, flags);
1686 isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, RH_PS_PSS);
1687 isp1362_hcd->rhport[wIndex] =
1688 isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex);
1689 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1693 spin_lock_irqsave(&isp1362_hcd->lock, flags);
1694 isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, RH_PS_PPS);
1695 isp1362_hcd->rhport[wIndex] =
1696 isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex);
1697 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1701 spin_lock_irqsave(&isp1362_hcd->lock, flags);
1707 tmp = isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + wIndex);
1715 isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + wIndex, (RH_PS_PRS));
1717 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1719 spin_lock_irqsave(&isp1362_hcd->lock, flags);
1722 isp1362_hcd->rhport[wIndex] = isp1362_read_reg32(isp1362_hcd,
1724 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1745 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1748 if (time_before(jiffies, isp1362_hcd->next_statechange))
1751 spin_lock_irqsave(&isp1362_hcd->lock, flags);
1753 isp1362_hcd->hc_control = isp1362_read_reg32(isp1362_hcd, HCCONTROL);
1754 switch (isp1362_hcd->hc_control & OHCI_CTRL_HCFS) {
1757 isp1362_hcd->hc_control &= ~OHCI_CTRL_HCFS;
1758 isp1362_hcd->hc_control |= OHCI_USB_RESET;
1759 isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control);
1773 if (!list_empty(&isp1362_hcd->atl_queue.active) ||
1774 !list_empty(&isp1362_hcd->intl_queue.active) ||
1775 !list_empty(&isp1362_hcd->istl_queue[0] .active) ||
1776 !list_empty(&isp1362_hcd->istl_queue[1] .active)) {
1779 isp1362_write_reg32(isp1362_hcd, HCATLSKIP, ~0);
1780 isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, ~0);
1781 isp1362_write_reg16(isp1362_hcd, HCBUFSTAT, 0);
1782 isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0);
1783 isp1362_write_reg32(isp1362_hcd, HCINTSTAT, OHCI_INTR_SF);
1790 if (isp1362_read_reg32(isp1362_hcd, HCINTSTAT) & OHCI_INTR_SF)
1794 if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_ATL) {
1795 u32 done_map = isp1362_read_reg32(isp1362_hcd, HCATLDONE);
1796 finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->atl_queue);
1798 if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_INTL) {
1799 u32 done_map = isp1362_read_reg32(isp1362_hcd, HCINTLDONE);
1800 finish_transfers(isp1362_hcd, done_map, &isp1362_hcd->intl_queue);
1802 if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_ISTL0)
1803 finish_iso_transfers(isp1362_hcd, &isp1362_hcd->istl_queue[0]);
1804 if (isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_ISTL1)
1805 finish_iso_transfers(isp1362_hcd, &isp1362_hcd->istl_queue[1]);
1808 isp1362_read_reg32(isp1362_hcd, HCINTSTAT));
1809 isp1362_write_reg32(isp1362_hcd, HCINTSTAT,
1810 isp1362_read_reg32(isp1362_hcd, HCINTSTAT));
1813 isp1362_hcd->hc_control = OHCI_USB_SUSPEND;
1814 isp1362_show_reg(isp1362_hcd, HCCONTROL);
1815 isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control);
1816 isp1362_show_reg(isp1362_hcd, HCCONTROL);
1818 isp1362_hcd->hc_control = isp1362_read_reg32(isp1362_hcd, HCCONTROL);
1819 if ((isp1362_hcd->hc_control & OHCI_CTRL_HCFS) != OHCI_USB_SUSPEND) {
1821 isp1362_hcd->hc_control);
1826 isp1362_hcd->next_statechange = jiffies + msecs_to_jiffies(5);
1832 isp1362_read_reg32(isp1362_hcd, HCCONTROL));
1834 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1840 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
1845 if (time_before(jiffies, isp1362_hcd->next_statechange))
1848 spin_lock_irqsave(&isp1362_hcd->lock, flags);
1849 isp1362_hcd->hc_control = isp1362_read_reg32(isp1362_hcd, HCCONTROL);
1850 pr_info("%s: HCCONTROL: %08x\n", __func__, isp1362_hcd->hc_control);
1855 switch (isp1362_hcd->hc_control & OHCI_CTRL_HCFS) {
1858 isp1362_hcd->hc_control &= ~OHCI_CTRL_HCFS;
1859 isp1362_hcd->hc_control |= OHCI_USB_RESUME;
1860 isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control);
1875 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1883 spin_lock_irqsave(&isp1362_hcd->lock, flags);
1884 port = isp1362_read_reg32(isp1362_hcd, HCRHDESCA) & RH_A_NDP;
1886 u32 stat = isp1362_read_reg32(isp1362_hcd, HCRHPORT1 + port);
1894 isp1362_write_reg32(isp1362_hcd, HCRHPORT1 + port, RH_PS_POCI);
1896 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1902 isp1362_hcd->hc_control = OHCI_USB_OPER;
1903 spin_lock_irqsave(&isp1362_hcd->lock, flags);
1904 isp1362_show_reg(isp1362_hcd, HCCONTROL);
1905 isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control);
1906 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
1911 isp1362_hcd->next_statechange = jiffies + msecs_to_jiffies(250);
1926 static inline void create_debug_file(struct isp1362_hcd *isp1362_hcd)
1929 static inline void remove_debug_file(struct isp1362_hcd *isp1362_hcd)
1988 static void dump_regs(struct seq_file *s, struct isp1362_hcd *isp1362_hcd)
1991 isp1362_read_reg32(isp1362_hcd, HCREVISION));
1993 isp1362_read_reg32(isp1362_hcd, HCCONTROL));
1995 isp1362_read_reg32(isp1362_hcd, HCCMDSTAT));
1997 isp1362_read_reg32(isp1362_hcd, HCINTSTAT));
1999 isp1362_read_reg32(isp1362_hcd, HCINTENB));
2001 isp1362_read_reg32(isp1362_hcd, HCFMINTVL));
2003 isp1362_read_reg32(isp1362_hcd, HCFMREM));
2005 isp1362_read_reg32(isp1362_hcd, HCFMNUM));
2007 isp1362_read_reg32(isp1362_hcd, HCLSTHRESH));
2009 isp1362_read_reg32(isp1362_hcd, HCRHDESCA));
2011 isp1362_read_reg32(isp1362_hcd, HCRHDESCB));
2013 isp1362_read_reg32(isp1362_hcd, HCRHSTATUS));
2015 isp1362_read_reg32(isp1362_hcd, HCRHPORT1));
2017 isp1362_read_reg32(isp1362_hcd, HCRHPORT2));
2020 isp1362_read_reg16(isp1362_hcd, HCHWCFG));
2022 isp1362_read_reg16(isp1362_hcd, HCDMACFG));
2024 isp1362_read_reg16(isp1362_hcd, HCXFERCTR));
2026 isp1362_read_reg16(isp1362_hcd, HCuPINT));
2028 isp1362_read_reg16(isp1362_hcd, HCuPINTENB));
2030 isp1362_read_reg16(isp1362_hcd, HCCHIPID));
2032 isp1362_read_reg16(isp1362_hcd, HCSCRATCH));
2034 isp1362_read_reg16(isp1362_hcd, HCBUFSTAT));
2036 isp1362_read_reg32(isp1362_hcd, HCDIRADDR));
2038 isp1362_read_reg16(isp1362_hcd, HCISTLBUFSZ));
2040 isp1362_read_reg16(isp1362_hcd, HCISTLRATE));
2043 isp1362_read_reg16(isp1362_hcd, HCINTLBUFSZ));
2045 isp1362_read_reg16(isp1362_hcd, HCINTLBLKSZ));
2047 isp1362_read_reg32(isp1362_hcd, HCINTLDONE));
2049 isp1362_read_reg32(isp1362_hcd, HCINTLSKIP));
2051 isp1362_read_reg32(isp1362_hcd, HCINTLLAST));
2053 isp1362_read_reg16(isp1362_hcd, HCINTLCURR));
2056 isp1362_read_reg16(isp1362_hcd, HCATLBUFSZ));
2058 isp1362_read_reg16(isp1362_hcd, HCATLBLKSZ));
2060 isp1362_read_reg32(isp1362_hcd, HCATLSKIP));
2062 isp1362_read_reg32(isp1362_hcd, HCATLLAST));
2064 isp1362_read_reg16(isp1362_hcd, HCATLCURR));
2067 isp1362_read_reg16(isp1362_hcd, HCATLDTC));
2069 isp1362_read_reg16(isp1362_hcd, HCATLDTCTO));
2074 struct isp1362_hcd *isp1362_hcd = s->private;
2079 isp1362_hcd_to_hcd(isp1362_hcd)->product_desc, hcd_name, DRIVER_VERSION);
2085 isp1362_hcd->stat16, isp1362_hcd->stat8, isp1362_hcd->stat4,
2086 isp1362_hcd->stat2, isp1362_hcd->stat1);
2087 seq_printf(s, "max # ptds in ATL fifo: %d\n", isp1362_hcd->atl_queue.stat_maxptds);
2088 seq_printf(s, "max # ptds in INTL fifo: %d\n", isp1362_hcd->intl_queue.stat_maxptds);
2090 max(isp1362_hcd->istl_queue[0] .stat_maxptds,
2091 isp1362_hcd->istl_queue[1] .stat_maxptds));
2093 spin_lock_irq(&isp1362_hcd->lock);
2095 dump_irq(s, "hc_irq_enable", isp1362_read_reg16(isp1362_hcd, HCuPINTENB));
2096 dump_irq(s, "hc_irq_status", isp1362_read_reg16(isp1362_hcd, HCuPINT));
2097 dump_int(s, "ohci_int_enable", isp1362_read_reg32(isp1362_hcd, HCINTENB));
2098 dump_int(s, "ohci_int_status", isp1362_read_reg32(isp1362_hcd, HCINTSTAT));
2099 dump_ctrl(s, "ohci_control", isp1362_read_reg32(isp1362_hcd, HCCONTROL));
2102 if (isp1362_hcd->irq_stat[i])
2104 ISP1362_INT_NAME(i), isp1362_hcd->irq_stat[i]);
2106 dump_regs(s, isp1362_hcd);
2107 list_for_each_entry(ep, &isp1362_hcd->async, schedule) {
2137 if (!list_empty(&isp1362_hcd->async))
2139 dump_ptd_queue(&isp1362_hcd->atl_queue);
2143 list_for_each_entry(ep, &isp1362_hcd->periodic, schedule) {
2145 isp1362_hcd->load[ep->branch], ep->ptd_index, ep->ptd_offset);
2155 dump_ptd_queue(&isp1362_hcd->intl_queue);
2159 list_for_each_entry(ep, &isp1362_hcd->isoc, schedule) {
2169 spin_unlock_irq(&isp1362_hcd->lock);
2187 /* expect just one isp1362_hcd per system */
2190 static void create_debug_file(struct isp1362_hcd *isp1362_hcd)
2201 pde->data = isp1362_hcd;
2202 isp1362_hcd->pde = pde;
2205 static void remove_debug_file(struct isp1362_hcd *isp1362_hcd)
2207 if (isp1362_hcd->pde)
2215 static void __isp1362_sw_reset(struct isp1362_hcd *isp1362_hcd)
2219 isp1362_write_reg16(isp1362_hcd, HCSWRES, HCSWRES_MAGIC);
2220 isp1362_write_reg32(isp1362_hcd, HCCMDSTAT, OHCI_HCR);
2223 if (!(isp1362_read_reg32(isp1362_hcd, HCCMDSTAT) & OHCI_HCR))
2230 static void isp1362_sw_reset(struct isp1362_hcd *isp1362_hcd)
2234 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2235 __isp1362_sw_reset(isp1362_hcd);
2236 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2241 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2282 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2285 isp1362_hcd->istl_queue[i].buf_start = i * istl_size / 2,
2286 isp1362_hcd->istl_queue[i].buf_size = istl_size / 2;
2287 isp1362_hcd->istl_queue[i].blk_size = 4;
2288 INIT_LIST_HEAD(&isp1362_hcd->istl_queue[i].active);
2289 snprintf(isp1362_hcd->istl_queue[i].name,
2290 sizeof(isp1362_hcd->istl_queue[i].name), "ISTL%d", i);
2292 isp1362_hcd->istl_queue[i].name,
2293 isp1362_hcd->istl_queue[i].buf_start,
2294 isp1362_hcd->istl_queue[i].buf_size);
2296 isp1362_write_reg16(isp1362_hcd, HCISTLBUFSZ, istl_size / 2);
2298 isp1362_hcd->intl_queue.buf_start = istl_size;
2299 isp1362_hcd->intl_queue.buf_size = intl_size;
2300 isp1362_hcd->intl_queue.buf_count = ISP1362_INTL_BUFFERS;
2301 isp1362_hcd->intl_queue.blk_size = intl_blksize;
2302 isp1362_hcd->intl_queue.buf_avail = isp1362_hcd->intl_queue.buf_count;
2303 isp1362_hcd->intl_queue.skip_map = ~0;
2304 INIT_LIST_HEAD(&isp1362_hcd->intl_queue.active);
2306 isp1362_write_reg16(isp1362_hcd, HCINTLBUFSZ,
2307 isp1362_hcd->intl_queue.buf_size);
2308 isp1362_write_reg16(isp1362_hcd, HCINTLBLKSZ,
2309 isp1362_hcd->intl_queue.blk_size - PTD_HEADER_SIZE);
2310 isp1362_write_reg32(isp1362_hcd, HCINTLSKIP, ~0);
2311 isp1362_write_reg32(isp1362_hcd, HCINTLLAST,
2314 isp1362_hcd->atl_queue.buf_start = istl_size + intl_size;
2315 isp1362_hcd->atl_queue.buf_size = atl_size;
2316 isp1362_hcd->atl_queue.buf_count = atl_buffers;
2317 isp1362_hcd->atl_queue.blk_size = atl_blksize;
2318 isp1362_hcd->atl_queue.buf_avail = isp1362_hcd->atl_queue.buf_count;
2319 isp1362_hcd->atl_queue.skip_map = ~0;
2320 INIT_LIST_HEAD(&isp1362_hcd->atl_queue.active);
2322 isp1362_write_reg16(isp1362_hcd, HCATLBUFSZ,
2323 isp1362_hcd->atl_queue.buf_size);
2324 isp1362_write_reg16(isp1362_hcd, HCATLBLKSZ,
2325 isp1362_hcd->atl_queue.blk_size - PTD_HEADER_SIZE);
2326 isp1362_write_reg32(isp1362_hcd, HCATLSKIP, ~0);
2327 isp1362_write_reg32(isp1362_hcd, HCATLLAST,
2330 snprintf(isp1362_hcd->atl_queue.name,
2331 sizeof(isp1362_hcd->atl_queue.name), "ATL");
2332 snprintf(isp1362_hcd->intl_queue.name,
2333 sizeof(isp1362_hcd->intl_queue.name), "INTL");
2335 isp1362_hcd->intl_queue.name,
2336 isp1362_hcd->intl_queue.buf_start,
2337 ISP1362_INTL_BUFFERS, isp1362_hcd->intl_queue.blk_size,
2338 isp1362_hcd->intl_queue.buf_size);
2340 isp1362_hcd->atl_queue.name,
2341 isp1362_hcd->atl_queue.buf_start,
2342 atl_buffers, isp1362_hcd->atl_queue.blk_size,
2343 isp1362_hcd->atl_queue.buf_size);
2345 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2353 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2361 if (isp1362_hcd->board && isp1362_hcd->board->reset) {
2362 isp1362_hcd->board->reset(hcd->self.controller, 1);
2364 if (isp1362_hcd->board->clock)
2365 isp1362_hcd->board->clock(hcd->self.controller, 1);
2366 isp1362_hcd->board->reset(hcd->self.controller, 0);
2368 isp1362_sw_reset(isp1362_hcd);
2373 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2374 clkrdy = isp1362_read_reg16(isp1362_hcd, HCuPINT) & HCuPINT_CLKRDY;
2375 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2380 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2381 isp1362_write_reg16(isp1362_hcd, HCuPINT, HCuPINT_CLKRDY);
2382 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2392 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2400 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2402 isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0);
2405 tmp = isp1362_read_reg32(isp1362_hcd, HCRHDESCA);
2407 isp1362_write_reg32(isp1362_hcd, HCRHDESCA, tmp);
2408 isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPS);
2411 if (isp1362_hcd->board && isp1362_hcd->board->reset)
2412 isp1362_hcd->board->reset(hcd->self.controller, 1);
2414 __isp1362_sw_reset(isp1362_hcd);
2416 if (isp1362_hcd->board && isp1362_hcd->board->clock)
2417 isp1362_hcd->board->clock(hcd->self.controller, 0);
2419 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2423 static int isp1362_chip_test(struct isp1362_hcd *isp1362_hcd)
2443 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2444 isp1362_write_buffer(isp1362_hcd, (u8 *)ref + offset, 0, j);
2445 isp1362_read_buffer(isp1362_hcd, (u8 *)tst + offset, 0, j);
2446 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2458 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2459 isp1362_write_buffer(isp1362_hcd, ref, 0, ISP1362_BUF_SIZE);
2460 isp1362_read_buffer(isp1362_hcd, tst, 0, ISP1362_BUF_SIZE);
2461 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2475 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2476 isp1362_write_buffer(isp1362_hcd, tst, 0, ISP1362_BUF_SIZE);
2477 isp1362_read_buffer(isp1362_hcd, tst, 0, ISP1362_BUF_SIZE);
2478 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2485 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2486 isp1362_write_buffer(isp1362_hcd, ref, offset * 2, PTD_HEADER_SIZE);
2487 isp1362_write_buffer(isp1362_hcd, ref + PTD_HEADER_SIZE / sizeof(*ref),
2489 isp1362_read_buffer(isp1362_hcd, tst, offset * 2,
2491 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2495 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2496 isp1362_read_buffer(isp1362_hcd, tst, offset * 2,
2498 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2518 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2519 struct isp1362_platform_data *board = isp1362_hcd->board;
2526 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2527 chipid = isp1362_read_reg16(isp1362_hcd, HCCHIPID);
2528 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2536 ret = isp1362_chip_test(isp1362_hcd);
2540 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2542 isp1362_write_reg16(isp1362_hcd, HCuPINT, 0xff);
2543 isp1362_write_reg16(isp1362_hcd, HCuPINTENB, 0);
2562 isp1362_write_reg16(isp1362_hcd, HCHWCFG, hwcfg);
2563 isp1362_show_reg(isp1362_hcd, HCHWCFG);
2564 isp1362_write_reg16(isp1362_hcd, HCDMACFG, 0);
2565 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2571 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2574 isp1362_hcd->rhdesca = 0;
2576 isp1362_hcd->rhdesca |= RH_A_NPS;
2578 isp1362_hcd->rhdesca |= RH_A_PSM;
2580 isp1362_hcd->rhdesca |= (board->potpg << 24) & RH_A_POTPGT;
2582 isp1362_hcd->rhdesca |= (25 << 24) & RH_A_POTPGT;
2584 isp1362_write_reg32(isp1362_hcd, HCRHDESCA, isp1362_hcd->rhdesca & ~RH_A_OCPM);
2585 isp1362_write_reg32(isp1362_hcd, HCRHDESCA, isp1362_hcd->rhdesca | RH_A_OCPM);
2586 isp1362_hcd->rhdesca = isp1362_read_reg32(isp1362_hcd, HCRHDESCA);
2588 isp1362_hcd->rhdescb = RH_B_PPCM;
2589 isp1362_write_reg32(isp1362_hcd, HCRHDESCB, isp1362_hcd->rhdescb);
2590 isp1362_hcd->rhdescb = isp1362_read_reg32(isp1362_hcd, HCRHDESCB);
2592 isp1362_read_reg32(isp1362_hcd, HCFMINTVL);
2593 isp1362_write_reg32(isp1362_hcd, HCFMINTVL, (FSMP(FI) << 16) | FI);
2594 isp1362_write_reg32(isp1362_hcd, HCLSTHRESH, LSTHRESH);
2596 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2598 isp1362_hcd->hc_control = OHCI_USB_OPER;
2601 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2603 isp1362_hcd->intenb = OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE;
2604 isp1362_hcd->intenb |= OHCI_INTR_RD;
2605 isp1362_hcd->irqenb = HCuPINT_OPR | HCuPINT_SUSP;
2606 isp1362_write_reg32(isp1362_hcd, HCINTENB, isp1362_hcd->intenb);
2607 isp1362_write_reg16(isp1362_hcd, HCuPINTENB, isp1362_hcd->irqenb);
2610 isp1362_write_reg32(isp1362_hcd, HCCONTROL, isp1362_hcd->hc_control);
2612 isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPSC | RH_HS_DRWE);
2614 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2624 .hcd_priv_size = sizeof(struct isp1362_hcd),
2652 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2655 remove_debug_file(isp1362_hcd);
2660 isp1362_hcd->data_reg);
2661 iounmap(isp1362_hcd->data_reg);
2664 isp1362_hcd->addr_reg);
2665 iounmap(isp1362_hcd->addr_reg);
2687 struct isp1362_hcd *isp1362_hcd;
2748 isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2749 isp1362_hcd->data_reg = data_reg;
2750 isp1362_hcd->addr_reg = addr_reg;
2752 isp1362_hcd->next_statechange = jiffies;
2753 spin_lock_init(&isp1362_hcd->lock);
2754 INIT_LIST_HEAD(&isp1362_hcd->async);
2755 INIT_LIST_HEAD(&isp1362_hcd->periodic);
2756 INIT_LIST_HEAD(&isp1362_hcd->isoc);
2757 INIT_LIST_HEAD(&isp1362_hcd->remove_list);
2758 isp1362_hcd->board = pdev->dev.platform_data;
2760 if (!isp1362_hcd->board->delay) {
2781 create_debug_file(isp1362_hcd);
2786 DBG(0, "%s: Freeing dev %p\n", __func__, isp1362_hcd);
2810 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2821 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2822 isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPS);
2823 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2833 struct isp1362_hcd *isp1362_hcd = hcd_to_isp1362_hcd(hcd);
2840 spin_lock_irqsave(&isp1362_hcd->lock, flags);
2841 isp1362_write_reg32(isp1362_hcd, HCRHSTATUS, RH_HS_LPSC);
2842 spin_unlock_irqrestore(&isp1362_hcd->lock, flags);
2848 return isp1362_bus_resume(isp1362_hcd_to_hcd(isp1362_hcd));