Lines Matching refs:REG_SET_BIT
955 REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION);
1311 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE);
1342 REG_SET_BIT(ah, AR_PCU_MISC_MODE2,
1761 REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
1791 REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
1836 REG_SET_BIT(ah, AR_RTC_RESET,
1839 REG_SET_BIT(ah, AR_RTC_FORCE_WAKE,
1848 REG_SET_BIT(ah, AR_RTC_FORCE_WAKE,
1925 REG_SET_BIT(ah, AR_TXCFG,
1966 REG_SET_BIT(ah, AR_TIMER_MODE, flags);
2035 REG_SET_BIT(ah, AR_TIMER_MODE,
2699 REG_SET_BIT(ah, gen_tmr_configuration[timer->index].mode_addr,
2703 REG_SET_BIT(ah, AR_IMR_S5,