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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/irda/

Lines Matching refs:fir_base

131 	void (*set_for_speed)(int fir_base, u32 speed);
132 int (*probe)(int fir_base);
186 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base);
187 static void smsc_ircc_setup_io(struct smsc_ircc_cb *self, unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq);
243 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed);
244 static int smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base);
245 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed);
246 static int smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base);
247 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed);
248 static int smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base);
515 static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq)
523 err = smsc_ircc_present(fir_base, sir_base);
551 dev->base_addr = self->io.fir_base = fir_base;
587 smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq);
630 release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
637 * Function smsc_ircc_present(fir_base, sir_base)
642 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base)
646 if (!request_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT,
648 IRDA_WARNING("%s: can't get fir_base of 0x%03x\n",
649 __func__, fir_base);
660 register_bank(fir_base, 3);
662 high = inb(fir_base + IRCC_ID_HIGH);
663 low = inb(fir_base + IRCC_ID_LOW);
664 chip = inb(fir_base + IRCC_CHIP_ID);
665 version = inb(fir_base + IRCC_VERSION);
666 config = inb(fir_base + IRCC_INTERFACE);
672 __func__, fir_base);
677 chip & 0x0f, version, fir_base, sir_base, dma, irq);
684 release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
690 * Function smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq)
696 unsigned int fir_base, unsigned int sir_base,
701 register_bank(fir_base, 3);
702 config = inb(fir_base + IRCC_INTERFACE);
706 self->io.fir_base = fir_base;
758 int iobase = self->io.fir_base;
941 int fir_base, ir_mode, ctrl, fast;
944 fir_base = self->io.fir_base;
972 register_bank(fir_base, 1);
973 outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | ir_mode), fir_base + IRCC_SCE_CFGA);
975 register_bank(fir_base, 4);
976 outb((inb(fir_base + IRCC_CONTROL) & 0x30) | ctrl, fir_base + IRCC_CONTROL);
988 int fir_base;
996 fir_base = self->io.fir_base;
1001 outb(inb(fir_base + IRCC_LCR_A) | IRCC_LCR_A_FIFO_RESET, fir_base + IRCC_LCR_A);
1004 /*outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, fir_base + IRCC_IER);*/
1006 register_bank(fir_base, 1);
1010 outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
1011 fir_base + IRCC_SCE_CFGB);
1013 outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
1014 fir_base + IRCC_SCE_CFGB);
1016 (void) inb(fir_base + IRCC_FIFO_THRESHOLD);
1019 outb(0, fir_base + IRCC_MASTER);
1020 register_bank(fir_base, 0);
1021 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, fir_base + IRCC_IER);
1022 outb(IRCC_MASTER_INT_EN, fir_base + IRCC_MASTER);
1033 int fir_base;
1039 fir_base = self->io.fir_base;
1040 register_bank(fir_base, 0);
1041 /*outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);*/
1042 outb(inb(fir_base + IRCC_LCR_B) & IRCC_LCR_B_SIP_ENABLE, fir_base + IRCC_LCR_B);
1227 int iobase = self->io.fir_base;
1280 int iobase = self->io.fir_base;
1320 int iobase = self->io.fir_base;
1371 int iobase = self->io.fir_base;
1482 iobase = self->io.fir_base;
1606 int iobase = self->io.fir_base;
1653 sprintf(hwname, "SMSC @ 0x%03x", self->io.fir_base);
1784 self->io.fir_base);
1786 release_region(self->io.fir_base, self->io.fir_ext);
1832 int fir_base, sir_base;
1840 fir_base = self->io.fir_base;
1844 outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);
1850 register_bank(fir_base, 1);
1851 outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | IRCC_CFGA_IRDA_SIR_A), fir_base + IRCC_SCE_CFGA);
1862 outb(0x00, fir_base + IRCC_MASTER);
1995 if (smsc_transceivers[i].probe(self->io.fir_base)) {
2021 smsc_transceivers[trx - 1].set_for_speed(self->io.fir_base, speed);
2834 * Function smsc_ircc_set_transceiver_smsc_ircc_atc(fir_base, speed)
2840 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed)
2849 register_bank(fir_base, 4);
2850 outb((inb(fir_base + IRCC_ATC) & IRCC_ATC_MASK) | IRCC_ATC_nPROGREADY|IRCC_ATC_ENABLE,
2851 fir_base + IRCC_ATC);
2853 while ((val = (inb(fir_base + IRCC_ATC) & IRCC_ATC_nPROGREADY)) &&
2859 inb(fir_base + IRCC_ATC));
2863 * Function smsc_ircc_probe_transceiver_smsc_ircc_atc(fir_base)
2869 static int smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base)
2881 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed)
2895 register_bank(fir_base, 0);
2896 outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2900 * Function smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(fir_base)
2906 static int smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base)
2912 * Function smsc_ircc_set_transceiver_toshiba_sat1800(fir_base, speed)
2918 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed)
2934 register_bank(fir_base, 0);
2935 outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2939 * Function smsc_ircc_probe_transceiver_toshiba_sat1800(fir_base)
2945 static int smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base)