Lines Matching refs:menelaus_write_reg
184 static int menelaus_write_reg(int reg, u8 value)
211 return menelaus_write_reg(MENELAUS_INT_MASK2,
215 return menelaus_write_reg(MENELAUS_INT_MASK1,
225 return menelaus_write_reg(MENELAUS_INT_MASK2,
229 return menelaus_write_reg(MENELAUS_INT_MASK1,
237 return menelaus_write_reg(MENELAUS_INT_ACK2, 1 << (irq - 8));
239 return menelaus_write_reg(MENELAUS_INT_ACK1, 1 << irq);
316 ret = menelaus_write_reg(MENELAUS_MCT_CTRL1, val);
336 ret = menelaus_write_reg(MENELAUS_GPIO_CTRL, ret);
369 ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, val);
392 ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, b);
398 ret = menelaus_write_reg(MENELAUS_MCT_CTRL3, val);
476 ret = menelaus_write_reg(vtg->vtg_reg, val);
480 ret = menelaus_write_reg(vtg->mode_reg, mode);
546 ret = menelaus_write_reg(MENELAUS_VCORE_CTRL1, val);
573 ret = menelaus_write_reg(MENELAUS_VCORE_CTRL3, fval);
576 ret = menelaus_write_reg(MENELAUS_VCORE_CTRL4, rval);
583 ret = menelaus_write_reg(MENELAUS_VCORE_CTRL1, val);
770 ret = menelaus_write_reg(MENELAUS_SLEEP_CTRL2, val);
784 ret = menelaus_write_reg(MENELAUS_GPIO_CTRL, ret);
880 status = menelaus_write_reg(regnum++, bin2bcd(t->tm_sec));
884 status = menelaus_write_reg(regnum++, bin2bcd(t->tm_min));
896 status = menelaus_write_reg(regnum++, hour);
900 status = menelaus_write_reg(regnum++, bin2bcd(t->tm_mday));
904 status = menelaus_write_reg(regnum++, bin2bcd(t->tm_mon + 1));
908 status = menelaus_write_reg(regnum++, bin2bcd(t->tm_year - 100));
958 status = menelaus_write_reg(MENELAUS_RTC_WKDAY, bin2bcd(t->tm_wday));
966 status = menelaus_write_reg(MENELAUS_RTC_UPDATE, RTC_UPDATE_EVERY);
1019 status = menelaus_write_reg(MENELAUS_RTC_CTRL,
1033 status = menelaus_write_reg(MENELAUS_RTC_CTRL,
1089 return menelaus_write_reg(MENELAUS_RTC_CTRL, the_menelaus->rtc_control);
1115 menelaus_write_reg(MENELAUS_RTC_CTRL, the_menelaus->rtc_control);
1149 menelaus_write_reg(MENELAUS_RTC_CTRL, m->rtc_control);
1212 menelaus_write_reg(MENELAUS_INT_ACK1, 0xff);
1213 menelaus_write_reg(MENELAUS_INT_ACK2, 0xff);
1214 menelaus_write_reg(MENELAUS_INT_MASK1, 0xff);
1215 menelaus_write_reg(MENELAUS_INT_MASK2, 0xff);
1220 menelaus_write_reg(MENELAUS_MCT_CTRL1, 0x73);