Lines Matching defs:dpll_clk
280 u8 dpll_clk; /* DPLL clock in MHz */
331 .dpll_clk = 0, /* no DPLL */
339 .dpll_clk = 48,
347 .dpll_clk = 48,
355 .dpll_clk = 48,
363 .dpll_clk = 55,
371 .dpll_clk = 66,
379 .dpll_clk = 66,
387 .dpll_clk = 66,
395 .dpll_clk = 77,
403 .dpll_clk = 77,
411 .dpll_clk = 77,
795 u8 pci_clk, dpll_clk = 0; /* PCI and DPLL clock in MHz */
879 dpll_clk = info->dpll_clk;
880 pci_clk = (f_cnt * dpll_clk) / 192;
894 dpll_clk, f_cnt, pci_clk);
952 dpll_clk = 66;
954 } else if (dpll_clk) { /* HPT36x chips don't have DPLL */
955 dpll_clk = 50;
972 f_low = (pci_clk * 48) / dpll_clk;
993 name, pci_name(dev), dpll_clk);
996 dpll_clk = 0;
1003 info->dpll_clk = dpll_clk;
1093 if (chip_type >= HPT372N && info->dpll_clk && info->pci_clk < 66) {