Lines Matching refs:dtd
677 struct intel_sdvo_dtd *dtd)
679 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
680 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
684 struct intel_sdvo_dtd *dtd)
687 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
691 struct intel_sdvo_dtd *dtd)
694 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
722 struct intel_sdvo_dtd *dtd)
725 &dtd->part1, sizeof(dtd->part1)) &&
727 &dtd->part2, sizeof(dtd->part2));
735 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
755 dtd->part1.clock = mode->clock / 10;
756 dtd->part1.h_active = width & 0xff;
757 dtd->part1.h_blank = h_blank_len & 0xff;
758 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
760 dtd->part1.v_active = height & 0xff;
761 dtd->part1.v_blank = v_blank_len & 0xff;
762 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
765 dtd->part2.h_sync_off = h_sync_offset & 0xff;
766 dtd->part2.h_sync_width = h_sync_len & 0xff;
767 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
769 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
773 dtd->part2.dtd_flags = 0x18;
775 dtd->part2.dtd_flags |= 0x2;
777 dtd->part2.dtd_flags |= 0x4;
779 dtd->part2.sdvo_flags = 0;
780 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
781 dtd->part2.reserved = 0;
785 const struct intel_sdvo_dtd *dtd)
787 mode->hdisplay = dtd->part1.h_active;
788 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
789 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
790 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
791 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
792 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
793 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
794 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
796 mode->vdisplay = dtd->part1.v_active;
797 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
799 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
800 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
801 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
803 (dtd->part2.v_sync_off_width & 0xf);
804 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
805 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
806 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
808 mode->clock = dtd->part1.clock * 10;
811 if (dtd->part2.dtd_flags & 0x2)
813 if (dtd->part2.dtd_flags & 0x4)