Lines Matching defs:immisreg

552     unsigned immisreg	: 2;  /* .imm field is a second register.
5674 inst.operands[i].immisreg = 1;
5973 [Rn, +/-Rm] .reg=Rn .imm=Rm .immisreg=1 .negative=0/1
5974 [Rn, +/-Rm, shift] .reg=Rn .imm=Rm .immisreg=1 .negative=0/1
5982 [Rn], +/-Rm .reg=Rn .imm=Rm .immisreg=1 .negative=0/1
5983 [Rn], +/-Rm, shift .reg=Rn .imm=Rm .immisreg=1 .negative=0/1
5988 [Rn], {option} .reg=Rn .imm=option .immisreg=0
6075 inst.operands[i].immisreg = 2;
6092 inst.operands[i].immisreg = 1;
6251 inst.operands[i].immisreg = 2;
6262 inst.operands[i].immisreg = 1;
8466 if (inst.operands[i].immisreg)
8488 if (inst.operands[i].immisreg)
8568 if (inst.operands[i].immisreg)
8625 if (inst.operands[i].immisreg && inst.operands[i].shifted)
8633 if (inst.operands[i].immisreg)
9919 if (inst.operands[2].immisreg
9933 || inst.operands[1].immisreg || inst.operands[1].shifted
9981 constraint (!(inst.operands[1].immisreg)
10657 || inst.operands[2].immisreg || inst.operands[2].shifted
10681 || inst.operands[2].immisreg || inst.operands[2].shifted
11204 && inst.operands[1].immisreg)
11393 constraint (inst.operands[i].immisreg,
11436 if (inst.operands[i].immisreg)
11821 constraint (inst.operands[2].shifted && inst.operands[2].immisreg,
11981 && inst.operands[2].immisreg,
12078 && inst.operands[2].immisreg,
12766 || inst.operands[1].immisreg || inst.operands[1].shifted
12825 if (inst.operands[1].immisreg)
12877 && !inst.operands[1].immisreg)
12889 if (inst.operands[1].immisreg)
12909 constraint (!inst.operands[1].isreg || !inst.operands[1].immisreg
12933 constraint (inst.operands[1].immisreg,
12949 if (!inst.operands[1].immisreg)
13175 else if (inst.operands[1].shifted && inst.operands[1].immisreg
13443 && inst.operands[1].immisreg,
13751 && inst.operands[2].immisreg,
13803 if (inst.operands[0].immisreg)
14275 || inst.operands[2].immisreg || inst.operands[2].shifted
14373 constraint (inst.operands[0].immisreg,
17479 constraint (inst.operands[1].immisreg, BAD_ADDR_MODE);
17698 if (inst.operands[1].immisreg == 2)
17703 else if (!inst.operands[1].immisreg)
17723 || inst.operands[1].immisreg != 0,
20883 if (inst.operands[1].immisreg)
21232 constraint (!inst.operands[1].immisreg,
21240 constraint (inst.operands[1].immisreg, BAD_ADDR_MODE);