Lines Matching refs:MASK
58 ori r0,r0,lo16(MASK(MSR_EE)+MASK(MSR_FP)+MASK(MSR_IR)+MASK(MSR_DR)) // turn off all 4
60 oris r0,r0,hi16(MASK(MSR_VEC)) // Turn off vector too
76 ori r0,r0,lo16(MASK(MSR_EE)) // turn EE and fp off
93 oris r0,r0,hi16(MASK(MSR_VEC)) // Always gonna turn of vectors
95 ori r0,r0,lo16(MASK(MSR_DR)+MASK(MSR_FP)) // always turn off DR and FP bit
157 mpr32bit: lis r8,hi16(MASK(MSR_VEC)) ; Get the vector flag
159 ori r8,r8,lo16(MASK(MSR_FP)) ; Add the FP flag
164 ori r8,r8,lo16(MASK(MSR_EE)|MASK(MSR_IR)|MASK(MSR_DR)) ; Drop EE, IR, and DR
228 ori r11,r2,lo16(MASK(MSR_DR)) ; Turn on data translation
306 ori r0,r0,lo16(MASK(MSR_IR)|MASK(MSR_DR)) ; Get the IR and DR bits
625 lis r8,hi16(MASK(MSR_VEC)) ; Get the vector flag
627 ori r8,r8,lo16(MASK(MSR_FP)) ; Add the FP flag
630 ori r9,r8,lo16(MASK(MSR_EE)|MASK(MSR_IR)|MASK(MSR_DR)) ; Drop EE, DR, and IR
704 lis r0,hi16(MASK(MSR_VEC)) ; Get vector enable
706 ori r0,r0,lo16(MASK(MSR_EE)|MASK(MSR_FP)) ; Get float enable and EE enable
720 ori r5,r5,lo16(MASK(MSR_EE)) ; Turn on the enable
859 lis r0,hi16(MASK(MSR_VEC)) ; Get the vector flag
860 ori r0,r0,lo16(MASK(MSR_FP)) ; Add the FP flag
862 ori r0,r0,lo16(MASK(MSR_EE)) ; Drop EE also
877 nonap: ori r3,r3,lo16(MASK(MSR_EE)) ; Flip on EE
934 mipNSF1: li r2,lo16(MASK(MSR_DR)|MASK(MSR_IR)) ; Get the translation mask
936 ori r7,r5,lo16(MASK(MSR_EE)) ; Flip on EE to make exit msr
939 ori r5,r5,lo16(MASK(MSR_EE)) ; Flip on EE to make nap msr
940 oris r2,r5,hi16(MASK(MSR_POW)) ; Turn on power management in next MSR
1117 ori r3,r5,lo16(MASK(MSR_EE)) ; Flip on EE
1145 oris r5,r5,hi16(MASK(MSR_POW)) ; Turn on power management in next MSR