Lines Matching refs:clock
77 /* Map the DSP clock detect bits to the generic driver clock
101 u8 clock;
105 clock = GD24_96000;
108 clock = GD24_88200;
111 clock = GD24_48000;
114 clock = GD24_44100;
117 clock = GD24_32000;
120 clock = GD24_22050;
123 clock = GD24_16000;
126 clock = GD24_11025;
129 clock = GD24_8000;
142 "set_sample_rate: %d clock %d\n", rate, clock);
147 clock = GD24_EXT_SYNC;
150 chip->comm_page->gd_clock_state = clock;
157 static int set_input_clock(struct echoaudio *chip, u16 clock)
159 if (snd_BUG_ON(clock != ECHO_CLOCK_INTERNAL &&
160 clock != ECHO_CLOCK_ESYNC))
162 chip->input_clock = clock;