Lines Matching refs:live

760 	state->stack[spi].spilled_ptr.live |= REG_LIVE_WRITTEN;
761 state->stack[spi - 1].spilled_ptr.live |= REG_LIVE_WRITTEN;
793 * parentage chain will still be live (i.e. reg->parent may be
799 state->stack[spi].spilled_ptr.live |= REG_LIVE_WRITTEN;
800 state->stack[spi - 1].spilled_ptr.live |= REG_LIVE_WRITTEN;
910 state->stack[spi].spilled_ptr.live |= REG_LIVE_WRITTEN;
911 state->stack[spi - 1].spilled_ptr.live |= REG_LIVE_WRITTEN;
1029 st->live |= REG_LIVE_WRITTEN;
1065 st->live |= REG_LIVE_WRITTEN;
2373 regs[i].live = REG_LIVE_NONE;
3023 if (writes && state->live & REG_LIVE_WRITTEN)
3025 if (parent->live & REG_LIVE_DONE) {
3034 if ((parent->live & REG_LIVE_READ) == flag ||
3035 parent->live & REG_LIVE_READ64)
3047 parent->live |= flag;
3050 parent->live &= ~REG_LIVE_READ32;
3281 reg->live |= REG_LIVE_WRITTEN;
4436 /* Copy src state preserving dst->parent and dst->live fields */
4440 enum bpf_reg_liveness live = dst->live;
4444 dst->live = live;
4456 state->stack[spi].spilled_ptr.live |= REG_LIVE_WRITTEN;
4574 state->stack[spi].spilled_ptr.live |= REG_LIVE_WRITTEN;
4767 state->regs[dst_regno].live |= REG_LIVE_WRITTEN;
4863 state->regs[dst_regno].live |= REG_LIVE_WRITTEN;
4871 state->regs[dst_regno].live |= REG_LIVE_WRITTEN;
10697 reg->live |= REG_LIVE_WRITTEN;
14077 dst_reg->live |= REG_LIVE_WRITTEN;
14096 dst_reg->live |= REG_LIVE_WRITTEN;
14122 dst_reg->live |= REG_LIVE_WRITTEN;
14133 dst_reg->live |= REG_LIVE_WRITTEN;
16413 enum bpf_reg_liveness live;
16417 live = st->regs[i].live;
16419 st->regs[i].live |= REG_LIVE_DONE;
16420 if (!(live & REG_LIVE_READ))
16428 live = st->stack[i].spilled_ptr.live;
16430 st->stack[i].spilled_ptr.live |= REG_LIVE_DONE;
16431 if (!(live & REG_LIVE_READ)) {
16444 if (st->frame[0]->regs[0].live & REG_LIVE_DONE)
16525 if (!(rold->live & REG_LIVE_READ) && exact == NOT_EXACT)
16647 unbound_reg.live |= REG_LIVE_READ;
16699 if (!(old->stack[spi].spilled_ptr.live & REG_LIVE_READ)
16926 u8 parent_flag = parent_reg->live & REG_LIVE_READ;
16927 u8 flag = reg->live & REG_LIVE_READ;
17017 !(state_reg->live & REG_LIVE_READ))
17035 !(state_reg->live & REG_LIVE_READ))
17397 if (sl->state.frame[0]->regs[0].live & REG_LIVE_DONE &&
17488 cur->frame[j]->regs[i].live = REG_LIVE_NONE;
17497 frame->stack[i].spilled_ptr.live = REG_LIVE_NONE;
18622 /* First live insn doesn't match first live linfo, it needs to "inherit"
18624 * means no live instructions after (tail of the program was removed).
19331 * live anymore. We can just unlink its descriptor table as it's