Lines Matching defs:mvi

63 	((void *) mvi->rx_fis + 0x100 * id)
65 ((void *) mvi->rx_fis + mvi->chip->fis_offs + 0x100 * reg_set)
91 int (*chip_init)(struct mvs_info *mvi);
92 int (*spi_init)(struct mvs_info *mvi);
93 int (*chip_ioremap)(struct mvs_info *mvi);
94 void (*chip_iounmap)(struct mvs_info *mvi);
95 irqreturn_t (*isr)(struct mvs_info *mvi, int irq, u32 stat);
96 u32 (*isr_status)(struct mvs_info *mvi, int irq);
97 void (*interrupt_enable)(struct mvs_info *mvi);
98 void (*interrupt_disable)(struct mvs_info *mvi);
100 u32 (*read_phy_ctl)(struct mvs_info *mvi, u32 port);
101 void (*write_phy_ctl)(struct mvs_info *mvi, u32 port, u32 val);
103 u32 (*read_port_cfg_data)(struct mvs_info *mvi, u32 port);
104 void (*write_port_cfg_data)(struct mvs_info *mvi, u32 port, u32 val);
105 void (*write_port_cfg_addr)(struct mvs_info *mvi, u32 port, u32 addr);
107 u32 (*read_port_vsr_data)(struct mvs_info *mvi, u32 port);
108 void (*write_port_vsr_data)(struct mvs_info *mvi, u32 port, u32 val);
109 void (*write_port_vsr_addr)(struct mvs_info *mvi, u32 port, u32 addr);
111 u32 (*read_port_irq_stat)(struct mvs_info *mvi, u32 port);
112 void (*write_port_irq_stat)(struct mvs_info *mvi, u32 port, u32 val);
114 u32 (*read_port_irq_mask)(struct mvs_info *mvi, u32 port);
115 void (*write_port_irq_mask)(struct mvs_info *mvi, u32 port, u32 val);
117 void (*command_active)(struct mvs_info *mvi, u32 slot_idx);
118 void (*clear_srs_irq)(struct mvs_info *mvi, u8 reg_set, u8 clear_all);
119 void (*issue_stop)(struct mvs_info *mvi, enum mvs_port_type type,
121 void (*start_delivery)(struct mvs_info *mvi, u32 tx);
122 u32 (*rx_update)(struct mvs_info *mvi);
123 void (*int_full)(struct mvs_info *mvi);
124 u8 (*assign_reg_set)(struct mvs_info *mvi, u8 *tfs);
125 void (*free_reg_set)(struct mvs_info *mvi, u8 *tfs);
129 void (*detect_porttype)(struct mvs_info *mvi, int i);
130 int (*oob_done)(struct mvs_info *mvi, int i);
131 void (*fix_phy_info)(struct mvs_info *mvi, int i,
133 void (*phy_work_around)(struct mvs_info *mvi, int i);
134 void (*phy_set_link_rate)(struct mvs_info *mvi, u32 phy_id,
137 void (*phy_disable)(struct mvs_info *mvi, u32 phy_id);
138 void (*phy_enable)(struct mvs_info *mvi, u32 phy_id);
139 void (*phy_reset)(struct mvs_info *mvi, u32 phy_id, int hard);
140 void (*stp_reset)(struct mvs_info *mvi, u32 phy_id);
141 void (*clear_active_cmds)(struct mvs_info *mvi);
142 u32 (*spi_read_data)(struct mvs_info *mvi);
143 void (*spi_write_data)(struct mvs_info *mvi, u32 data);
144 int (*spi_buildcmd)(struct mvs_info *mvi,
151 int (*spi_issuecmd)(struct mvs_info *mvi, u32 cmd);
152 int (*spi_waitdataready)(struct mvs_info *mvi, u32 timeout);
153 void (*dma_fix)(struct mvs_info *mvi, u32 phy_mask,
155 void (*tune_interrupt)(struct mvs_info *mvi, u32 time);
156 void (*non_spec_ncq_error)(struct mvs_info *mvi);
172 #define MVS_MAX_SG (1U << mvi->chip->sg_width)
173 #define MVS_CHIP_SLOT_SZ (1U << mvi->chip->slot_width)
175 (mvi->chip->fis_offs + (mvi->chip->fis_count * 0x100))
176 #define MVS_CHIP_DISP (mvi->chip->dispatch)
203 struct mvs_info *mvi;
404 struct mvs_info *mvi[2];
410 struct mvs_info *mvi;
427 int mvs_ioremap(struct mvs_info *mvi, int bar, int bar_ex);
428 void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard);
431 void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo,
442 int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags);
445 void mvs_release_task(struct mvs_info *mvi,
447 void mvs_do_release_task(struct mvs_info *mvi, int phy_no,
449 void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events);
450 void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st);
451 int mvs_int_rx(struct mvs_info *mvi, bool self_clear);
452 struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi, u8 reg_set);