Lines Matching defs:adsp
122 struct qcom_adsp *adsp = rproc->priv;
125 total_offset = segment->da + segment->offset + offset - adsp->mem_phys;
126 if (total_offset < 0 || total_offset + size > adsp->mem_size) {
127 dev_err(adsp->dev,
134 memcpy_fromio(dest, adsp->mem_region + total_offset, size);
139 struct qcom_adsp *adsp = rproc->priv;
144 qcom_minidump(rproc, adsp->minidump_id, adsp_segment_dump);
147 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds,
174 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
185 static int adsp_shutdown_poll_decrypt(struct qcom_adsp *adsp)
192 ret = qcom_scm_pas_shutdown(adsp->pas_id);
200 struct qcom_adsp *adsp = rproc->priv;
208 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
209 if (adsp->dtb_pas_id)
210 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
217 struct qcom_adsp *adsp = rproc->priv;
221 adsp->firmware = fw;
223 if (adsp->lite_pas_id)
224 ret = qcom_scm_pas_shutdown(adsp->lite_pas_id);
226 if (adsp->dtb_pas_id) {
227 ret = request_firmware(&adsp->dtb_firmware, adsp->dtb_firmware_name, adsp->dev);
229 dev_err(adsp->dev, "request_firmware failed for %s: %d\n",
230 adsp->dtb_firmware_name, ret);
234 ret = qcom_mdt_pas_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
235 adsp->dtb_pas_id, adsp->dtb_mem_phys,
236 &adsp->dtb_pas_metadata);
240 ret = qcom_mdt_load_no_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
241 adsp->dtb_pas_id, adsp->dtb_mem_region,
242 adsp->dtb_mem_phys, adsp->dtb_mem_size,
243 &adsp->dtb_mem_reloc);
251 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
254 release_firmware(adsp->dtb_firmware);
261 struct qcom_adsp *adsp = rproc->priv;
264 ret = qcom_q6v5_prepare(&adsp->q6v5);
268 ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
272 ret = clk_prepare_enable(adsp->xo);
276 ret = clk_prepare_enable(adsp->aggre2_clk);
280 if (adsp->cx_supply) {
281 ret = regulator_enable(adsp->cx_supply);
286 if (adsp->px_supply) {
287 ret = regulator_enable(adsp->px_supply);
292 if (adsp->dtb_pas_id) {
293 ret = qcom_scm_pas_auth_and_reset(adsp->dtb_pas_id);
295 dev_err(adsp->dev,
301 ret = qcom_mdt_pas_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
302 adsp->mem_phys, &adsp->pas_metadata);
306 ret = qcom_mdt_load_no_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
307 adsp->mem_region, adsp->mem_phys, adsp->mem_size,
308 &adsp->mem_reloc);
312 qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size);
314 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
316 dev_err(adsp->dev,
321 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000));
323 dev_err(adsp->dev, "start timed out\n");
324 qcom_scm_pas_shutdown(adsp->pas_id);
328 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
329 if (adsp->dtb_pas_id)
330 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
333 adsp->firmware = NULL;
338 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
339 if (adsp->dtb_pas_id)
340 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
342 if (adsp->px_supply)
343 regulator_disable(adsp->px_supply);
345 if (adsp->cx_supply)
346 regulator_disable(adsp->cx_supply);
348 clk_disable_unprepare(adsp->aggre2_clk);
350 clk_disable_unprepare(adsp->xo);
352 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
354 qcom_q6v5_unprepare(&adsp->q6v5);
357 adsp->firmware = NULL;
364 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
366 if (adsp->px_supply)
367 regulator_disable(adsp->px_supply);
368 if (adsp->cx_supply)
369 regulator_disable(adsp->cx_supply);
370 clk_disable_unprepare(adsp->aggre2_clk);
371 clk_disable_unprepare(adsp->xo);
372 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
377 struct qcom_adsp *adsp = rproc->priv;
381 ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon);
383 dev_err(adsp->dev, "timed out on wait\n");
385 ret = qcom_scm_pas_shutdown(adsp->pas_id);
386 if (ret && adsp->decrypt_shutdown)
387 ret = adsp_shutdown_poll_decrypt(adsp);
390 dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
392 if (adsp->dtb_pas_id) {
393 ret = qcom_scm_pas_shutdown(adsp->dtb_pas_id);
395 dev_err(adsp->dev, "failed to shutdown dtb: %d\n", ret);
398 handover = qcom_q6v5_unprepare(&adsp->q6v5);
400 qcom_pas_handover(&adsp->q6v5);
407 struct qcom_adsp *adsp = rproc->priv;
410 offset = da - adsp->mem_reloc;
411 if (offset < 0 || offset + len > adsp->mem_size)
417 return adsp->mem_region + offset;
422 struct qcom_adsp *adsp = rproc->priv;
424 return qcom_q6v5_panic(&adsp->q6v5);
448 static int adsp_init_clock(struct qcom_adsp *adsp)
452 adsp->xo = devm_clk_get(adsp->dev, "xo");
453 if (IS_ERR(adsp->xo)) {
454 ret = PTR_ERR(adsp->xo);
456 dev_err(adsp->dev, "failed to get xo clock");
460 adsp->aggre2_clk = devm_clk_get_optional(adsp->dev, "aggre2");
461 if (IS_ERR(adsp->aggre2_clk)) {
462 ret = PTR_ERR(adsp->aggre2_clk);
464 dev_err(adsp->dev,
472 static int adsp_init_regulator(struct qcom_adsp *adsp)
474 adsp->cx_supply = devm_regulator_get_optional(adsp->dev, "cx");
475 if (IS_ERR(adsp->cx_supply)) {
476 if (PTR_ERR(adsp->cx_supply) == -ENODEV)
477 adsp->cx_supply = NULL;
479 return PTR_ERR(adsp->cx_supply);
482 if (adsp->cx_supply)
483 regulator_set_load(adsp->cx_supply, 100000);
485 adsp->px_supply = devm_regulator_get_optional(adsp->dev, "px");
486 if (IS_ERR(adsp->px_supply)) {
487 if (PTR_ERR(adsp->px_supply) == -ENODEV)
488 adsp->px_supply = NULL;
490 return PTR_ERR(adsp->px_supply);
533 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
536 struct device *dev = adsp->dev;
549 static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
554 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
556 dev_err(adsp->dev, "no memory-region specified\n");
563 dev_err(adsp->dev, "unable to resolve memory-region\n");
567 adsp->mem_phys = adsp->mem_reloc = rmem->base;
568 adsp->mem_size = rmem->size;
569 adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
570 if (!adsp->mem_region) {
571 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
572 &rmem->base, adsp->mem_size);
576 if (!adsp->dtb_pas_id)
579 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 1);
581 dev_err(adsp->dev, "no dtb memory-region specified\n");
588 dev_err(adsp->dev, "unable to resolve dtb memory-region\n");
592 adsp->dtb_mem_phys = adsp->dtb_mem_reloc = rmem->base;
593 adsp->dtb_mem_size = rmem->size;
594 adsp->dtb_mem_region = devm_ioremap_wc(adsp->dev, adsp->dtb_mem_phys, adsp->dtb_mem_size);
595 if (!adsp->dtb_mem_region) {
596 dev_err(adsp->dev, "unable to map dtb memory region: %pa+%zx\n",
597 &rmem->base, adsp->dtb_mem_size);
604 static int adsp_assign_memory_region(struct qcom_adsp *adsp)
612 if (!adsp->region_assign_idx)
615 for (offset = 0; offset < adsp->region_assign_count; ++offset) {
618 node = of_parse_phandle(adsp->dev->of_node, "memory-region",
619 adsp->region_assign_idx + offset);
624 dev_err(adsp->dev, "unable to resolve shareable memory-region index %d\n",
629 if (adsp->region_assign_shared) {
632 perm[1].vmid = adsp->region_assign_vmid;
636 perm[0].vmid = adsp->region_assign_vmid;
641 adsp->region_assign_phys[offset] = rmem->base;
642 adsp->region_assign_size[offset] = rmem->size;
643 adsp->region_assign_owners[offset] = BIT(QCOM_SCM_VMID_HLOS);
645 ret = qcom_scm_assign_mem(adsp->region_assign_phys[offset],
646 adsp->region_assign_size[offset],
647 &adsp->region_assign_owners[offset],
650 dev_err(adsp->dev, "assign memory %d failed\n", offset);
658 static void adsp_unassign_memory_region(struct qcom_adsp *adsp)
664 if (!adsp->region_assign_idx || adsp->region_assign_shared)
667 for (offset = 0; offset < adsp->region_assign_count; ++offset) {
671 ret = qcom_scm_assign_mem(adsp->region_assign_phys[offset],
672 adsp->region_assign_size[offset],
673 &adsp->region_assign_owners[offset],
676 dev_err(adsp->dev, "unassign memory %d failed\n", offset);
683 struct qcom_adsp *adsp;
713 rproc = devm_rproc_alloc(&pdev->dev, pdev->name, ops, fw_name, sizeof(*adsp));
723 adsp = rproc->priv;
724 adsp->dev = &pdev->dev;
725 adsp->rproc = rproc;
726 adsp->minidump_id = desc->minidump_id;
727 adsp->pas_id = desc->pas_id;
728 adsp->lite_pas_id = desc->lite_pas_id;
729 adsp->info_name = desc->sysmon_name;
730 adsp->decrypt_shutdown = desc->decrypt_shutdown;
731 adsp->region_assign_idx = desc->region_assign_idx;
732 adsp->region_assign_count = min_t(int, MAX_ASSIGN_COUNT, desc->region_assign_count);
733 adsp->region_assign_vmid = desc->region_assign_vmid;
734 adsp->region_assign_shared = desc->region_assign_shared;
736 adsp->dtb_firmware_name = dtb_fw_name;
737 adsp->dtb_pas_id = desc->dtb_pas_id;
739 platform_set_drvdata(pdev, adsp);
741 ret = device_init_wakeup(adsp->dev, true);
745 ret = adsp_alloc_memory_region(adsp);
749 ret = adsp_assign_memory_region(adsp);
753 ret = adsp_init_clock(adsp);
757 ret = adsp_init_regulator(adsp);
761 ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds,
765 adsp->proxy_pd_count = ret;
767 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state,
772 qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name);
773 qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
774 adsp->sysmon = qcom_add_sysmon_subdev(rproc,
777 if (IS_ERR(adsp->sysmon)) {
778 ret = PTR_ERR(adsp->sysmon);
782 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
790 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
792 device_init_wakeup(adsp->dev, false);
799 struct qcom_adsp *adsp = platform_get_drvdata(pdev);
801 rproc_del(adsp->rproc);
803 qcom_q6v5_deinit(&adsp->q6v5);
804 adsp_unassign_memory_region(adsp);
805 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
806 qcom_remove_sysmon_subdev(adsp->sysmon);
807 qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
808 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
809 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
810 device_init_wakeup(adsp->dev, false);
815 .firmware_name = "adsp.mdt",
819 .sysmon_name = "adsp",
825 .firmware_name = "adsp.mdt",
828 .load_state = "adsp",
830 .sysmon_name = "adsp",
836 .firmware_name = "adsp.mdt",
844 .load_state = "adsp",
846 .sysmon_name = "adsp",
867 .firmware_name = "adsp.mdt",
874 .load_state = "adsp",
876 .sysmon_name = "adsp",
882 .firmware_name = "adsp.mdt",
890 .load_state = "adsp",
892 .sysmon_name = "adsp",
898 .firmware_name = "adsp.mdt",
906 .load_state = "adsp",
908 .sysmon_name = "adsp",
914 .firmware_name = "adsp.mdt",
922 .sysmon_name = "adsp",
1023 .firmware_name = "adsp.mdt",
1035 .load_state = "adsp",
1037 .sysmon_name = "adsp",
1184 .firmware_name = "adsp.mdt",
1195 .load_state = "adsp",
1197 .sysmon_name = "adsp",
1308 { .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init},
1309 { .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource},
1310 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
1311 { .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource},
1313 { .compatible = "qcom,msm8998-adsp-pas", .data = &msm8996_adsp_resource},
1315 { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init },
1318 { .compatible = "qcom,sc7180-adsp-pas", .data = &sm8250_adsp_resource},
1320 { .compatible = "qcom,sc7280-adsp-pas", .data = &sm8350_adsp_resource},
1324 { .compatible = "qcom,sc8180x-adsp-pas", .data = &sm8150_adsp_resource},
1327 { .compatible = "qcom,sc8280xp-adsp-pas", .data = &sm8250_adsp_resource},
1330 { .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init},
1331 { .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init},
1335 { .compatible = "qcom,sm6115-adsp-pas", .data = &adsp_resource_init},
1338 { .compatible = "qcom,sm6350-adsp-pas", .data = &sm6350_adsp_resource},
1341 { .compatible = "qcom,sm6375-adsp-pas", .data = &sm6350_adsp_resource},
1344 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
1348 { .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource},
1351 { .compatible = "qcom,sm8350-adsp-pas", .data = &sm8350_adsp_resource},
1355 { .compatible = "qcom,sm8450-adsp-pas", .data = &sm8350_adsp_resource},
1359 { .compatible = "qcom,sm8550-adsp-pas", .data = &sm8550_adsp_resource},
1362 { .compatible = "qcom,sm8650-adsp-pas", .data = &sm8550_adsp_resource},
1365 { .compatible = "qcom,x1e80100-adsp-pas", .data = &x1e80100_adsp_resource},