drivers/pwm/pwm-microchip-core.c

81 	reg_offset = MCHPCOREPWM_EN(pwm->hwpwm >> 3);
82 	shift = pwm->hwpwm & 7;
89 	mchp_core_pwm->channel_enabled &= ~BIT(pwm->hwpwm);
90 	mchp_core_pwm->channel_enabled |= enable << pwm->hwpwm;
97 	if (mchp_core_pwm->sync_update_mask & (1 << pwm->hwpwm))
180 	writel_relaxed(posedge, mchp_core_pwm->base + MCHPCOREPWM_POSEDGE(pwm->hwpwm));
181 	writel_relaxed(negedge, mchp_core_pwm->base + MCHPCOREPWM_NEGEDGE(pwm->hwpwm));
310 	period_locked = mchp_core_pwm->channel_enabled & ~(1 << pwm->hwpwm);
367 	mchp_core_pwm_wait_for_sync_update(mchp_core_pwm, pwm->hwpwm);
386 	mchp_core_pwm_wait_for_sync_update(mchp_core_pwm, pwm->hwpwm);
388 	if (mchp_core_pwm->channel_enabled & (1 << pwm->hwpwm))
415 	posedge = readb_relaxed(mchp_core_pwm->base + MCHPCOREPWM_POSEDGE(pwm->hwpwm));
416 	negedge = readb_relaxed(mchp_core_pwm->base + MCHPCOREPWM_NEGEDGE(pwm->hwpwm));