Lines Matching refs:clk_rate
133 static u64 mchp_core_pwm_calc_duty(const struct pwm_state *state, u64 clk_rate,
141 * step_in_ns = (prescale * NSEC_PER_SEC) / clk_rate
145 duty_steps = mul_u64_u64_div_u64(state->duty_cycle, clk_rate, tmp);
184 static int mchp_core_pwm_calc_period(const struct pwm_state *state, unsigned long clk_rate,
195 * clk_rate
206 * It's therefore not possible to set a period lower than 1/clk_rate, so
211 tmp = mul_u64_u64_div_u64(state->period, clk_rate, NSEC_PER_SEC);
248 * period * clk_rate
253 * period * clk_rate
261 * period * clk_rate
278 unsigned long clk_rate;
289 * If clk_rate is too big, the following multiplication might overflow.
293 clk_rate = clk_get_rate(mchp_core_pwm->clk);
294 if (clk_rate >= NSEC_PER_SEC)
297 ret = mchp_core_pwm_calc_period(state, clk_rate, &prescale, &period_steps);
337 duty_steps = mchp_core_pwm_calc_duty(state, clk_rate, prescale, period_steps);
401 * clk_rate