Lines Matching refs:jzpc
142 struct ingenic_pinctrl *jzpc;
164 is_soc_or_above(const struct ingenic_pinctrl *jzpc, enum jz_version version)
168 || jzpc->info->version >= version);
3266 regmap_read(jzgc->jzpc->map, jzgc->reg_base + reg, &val);
3274 if (!is_soc_or_above(jzgc->jzpc, ID_JZ4740)) {
3275 regmap_update_bits(jzgc->jzpc->map, jzgc->reg_base + reg,
3285 regmap_write(jzgc->jzpc->map, jzgc->reg_base + reg, BIT(offset));
3296 regmap_write(jzgc->jzpc->map, REG_PZ_BASE(
3297 jzgc->jzpc->info->reg_offset) + reg, BIT(offset));
3302 regmap_write(jzgc->jzpc->map, REG_PZ_GID2LD(
3303 jzgc->jzpc->info->reg_offset),
3318 regmap_update_bits(jzgc->jzpc->map, jzgc->reg_base + reg, mask, value << (idx * 2));
3332 if (is_soc_or_above(jzgc->jzpc, ID_JZ4770))
3334 else if (is_soc_or_above(jzgc->jzpc, ID_JZ4740))
3369 if (is_soc_or_above(jzgc->jzpc, ID_JZ4770)) {
3372 } else if (is_soc_or_above(jzgc->jzpc, ID_JZ4740)) {
3382 if (is_soc_or_above(jzgc->jzpc, ID_X2000)) {
3387 } else if (is_soc_or_above(jzgc->jzpc, ID_X1000)) {
3403 if (is_soc_or_above(jzgc->jzpc, ID_JZ4740))
3415 if (is_soc_or_above(jzgc->jzpc, ID_JZ4740))
3429 if (is_soc_or_above(jzgc->jzpc, ID_JZ4770))
3431 else if (is_soc_or_above(jzgc->jzpc, ID_JZ4740))
3447 if (is_soc_or_above(jzgc->jzpc, ID_JZ4770))
3449 else if (is_soc_or_above(jzgc->jzpc, ID_JZ4740))
3465 !is_soc_or_above(jzgc->jzpc, ID_X2000)) {
3477 if (is_soc_or_above(jzgc->jzpc, ID_JZ4770))
3479 else if (is_soc_or_above(jzgc->jzpc, ID_JZ4740))
3505 if ((type == IRQ_TYPE_EDGE_BOTH) && !is_soc_or_above(jzgc->jzpc, ID_X2000)) {
3537 if (is_soc_or_above(jzgc->jzpc, ID_JZ4770))
3539 else if (is_soc_or_above(jzgc->jzpc, ID_JZ4740))
3571 static inline void ingenic_config_pin(struct ingenic_pinctrl *jzpc,
3578 if (is_soc_or_above(jzpc, ID_JZ4740))
3579 regmap_write(jzpc->map, offt * jzpc->info->reg_offset +
3582 regmap_set_bits(jzpc->map, offt * jzpc->info->reg_offset +
3585 if (is_soc_or_above(jzpc, ID_JZ4740))
3586 regmap_write(jzpc->map, offt * jzpc->info->reg_offset +
3589 regmap_clear_bits(jzpc->map, offt * jzpc->info->reg_offset +
3594 static inline void ingenic_shadow_config_pin(struct ingenic_pinctrl *jzpc,
3599 regmap_write(jzpc->map, REG_PZ_BASE(jzpc->info->reg_offset) +
3603 static inline void ingenic_shadow_config_pin_load(struct ingenic_pinctrl *jzpc,
3606 regmap_write(jzpc->map, REG_PZ_GID2LD(jzpc->info->reg_offset),
3610 static inline void jz4730_config_pin_function(struct ingenic_pinctrl *jzpc,
3622 regmap_update_bits(jzpc->map, offt * jzpc->info->reg_offset + reg,
3626 static inline bool ingenic_get_pin_config(struct ingenic_pinctrl *jzpc,
3633 regmap_read(jzpc->map, offt * jzpc->info->reg_offset + reg, &val);
3641 struct ingenic_pinctrl *jzpc = jzgc->jzpc;
3644 if (is_soc_or_above(jzpc, ID_JZ4770)) {
3645 if (ingenic_get_pin_config(jzpc, pin, JZ4770_GPIO_INT) ||
3646 ingenic_get_pin_config(jzpc, pin, JZ4770_GPIO_PAT1))
3649 } else if (!is_soc_or_above(jzpc, ID_JZ4740)) {
3650 if (!ingenic_get_pin_config(jzpc, pin, JZ4730_GPIO_GPDIR))
3655 if (ingenic_get_pin_config(jzpc, pin, JZ4740_GPIO_SELECT))
3658 if (ingenic_get_pin_config(jzpc, pin, JZ4740_GPIO_DIR))
3714 static int ingenic_pinmux_set_pin_fn(struct ingenic_pinctrl *jzpc,
3720 dev_dbg(jzpc->dev, "set pin P%c%u to function %u\n",
3723 if (is_soc_or_above(jzpc, ID_X1000)) {
3724 ingenic_shadow_config_pin(jzpc, pin, JZ4770_GPIO_INT, false);
3725 ingenic_shadow_config_pin(jzpc, pin, GPIO_MSK, false);
3726 ingenic_shadow_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, func & 0x2);
3727 ingenic_shadow_config_pin(jzpc, pin, JZ4770_GPIO_PAT0, func & 0x1);
3728 ingenic_shadow_config_pin_load(jzpc, pin);
3729 } else if (is_soc_or_above(jzpc, ID_JZ4770)) {
3730 ingenic_config_pin(jzpc, pin, JZ4770_GPIO_INT, false);
3731 ingenic_config_pin(jzpc, pin, GPIO_MSK, false);
3732 ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, func & 0x2);
3733 ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT0, func & 0x1);
3734 } else if (is_soc_or_above(jzpc, ID_JZ4740)) {
3735 ingenic_config_pin(jzpc, pin, JZ4740_GPIO_FUNC, true);
3736 ingenic_config_pin(jzpc, pin, JZ4740_GPIO_TRIG, func & 0x2);
3737 ingenic_config_pin(jzpc, pin, JZ4740_GPIO_SELECT, func & 0x1);
3739 ingenic_config_pin(jzpc, pin, JZ4730_GPIO_GPIER, false);
3740 jz4730_config_pin_function(jzpc, pin, JZ4730_GPIO_GPAUR, JZ4730_GPIO_GPALR, func);
3749 struct ingenic_pinctrl *jzpc = pinctrl_dev_get_drvdata(pctldev);
3770 ingenic_pinmux_set_pin_fn(jzpc, grp->grp.pins[i], mode);
3775 ingenic_pinmux_set_pin_fn(jzpc, grp->grp.pins[i], pin_modes[i]);
3785 struct ingenic_pinctrl *jzpc = pinctrl_dev_get_drvdata(pctldev);
3792 if (is_soc_or_above(jzpc, ID_X1000)) {
3793 ingenic_shadow_config_pin(jzpc, pin, JZ4770_GPIO_INT, false);
3794 ingenic_shadow_config_pin(jzpc, pin, GPIO_MSK, true);
3795 ingenic_shadow_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, input);
3796 ingenic_shadow_config_pin_load(jzpc, pin);
3797 } else if (is_soc_or_above(jzpc, ID_JZ4770)) {
3798 ingenic_config_pin(jzpc, pin, JZ4770_GPIO_INT, false);
3799 ingenic_config_pin(jzpc, pin, GPIO_MSK, true);
3800 ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, input);
3801 } else if (is_soc_or_above(jzpc, ID_JZ4740)) {
3802 ingenic_config_pin(jzpc, pin, JZ4740_GPIO_SELECT, false);
3803 ingenic_config_pin(jzpc, pin, JZ4740_GPIO_DIR, !input);
3804 ingenic_config_pin(jzpc, pin, JZ4740_GPIO_FUNC, false);
3806 ingenic_config_pin(jzpc, pin, JZ4730_GPIO_GPIER, false);
3807 ingenic_config_pin(jzpc, pin, JZ4730_GPIO_GPDIR, !input);
3808 jz4730_config_pin_function(jzpc, pin, JZ4730_GPIO_GPAUR, JZ4730_GPIO_GPALR, 0);
3825 struct ingenic_pinctrl *jzpc = pinctrl_dev_get_drvdata(pctldev);
3833 if (is_soc_or_above(jzpc, ID_X2000)) {
3834 pullup = ingenic_get_pin_config(jzpc, pin, X2000_GPIO_PEPU) &&
3835 !ingenic_get_pin_config(jzpc, pin, X2000_GPIO_PEPD) &&
3836 (jzpc->info->pull_ups[offt] & BIT(idx));
3837 pulldown = ingenic_get_pin_config(jzpc, pin, X2000_GPIO_PEPD) &&
3838 !ingenic_get_pin_config(jzpc, pin, X2000_GPIO_PEPU) &&
3839 (jzpc->info->pull_downs[offt] & BIT(idx));
3841 } else if (is_soc_or_above(jzpc, ID_X1830)) {
3846 regmap_read(jzpc->map, offt * jzpc->info->reg_offset +
3849 regmap_read(jzpc->map, offt * jzpc->info->reg_offset +
3854 pullup = (bias == GPIO_PULL_UP) && (jzpc->info->pull_ups[offt] & BIT(idx));
3855 pulldown = (bias == GPIO_PULL_DOWN) && (jzpc->info->pull_downs[offt] & BIT(idx));
3858 if (is_soc_or_above(jzpc, ID_JZ4770))
3859 pull = !ingenic_get_pin_config(jzpc, pin, JZ4770_GPIO_PEN);
3860 else if (is_soc_or_above(jzpc, ID_JZ4740))
3861 pull = !ingenic_get_pin_config(jzpc, pin, JZ4740_GPIO_PULL_DIS);
3863 pull = ingenic_get_pin_config(jzpc, pin, JZ4730_GPIO_GPPUR);
3865 pullup = pull && (jzpc->info->pull_ups[offt] & BIT(idx));
3866 pulldown = pull && (jzpc->info->pull_downs[offt] & BIT(idx));
3889 if (is_soc_or_above(jzpc, ID_X2000))
3891 else if (is_soc_or_above(jzpc, ID_X1830))
3896 arg = !!ingenic_get_pin_config(jzpc, pin, reg);
3900 if (is_soc_or_above(jzpc, ID_X2000))
3902 else if (is_soc_or_above(jzpc, ID_X1830))
3907 arg = !!ingenic_get_pin_config(jzpc, pin, reg);
3918 static void ingenic_set_bias(struct ingenic_pinctrl *jzpc,
3921 if (is_soc_or_above(jzpc, ID_X2000)) {
3924 ingenic_config_pin(jzpc, pin, X2000_GPIO_PEPD, false);
3925 ingenic_config_pin(jzpc, pin, X2000_GPIO_PEPU, true);
3929 ingenic_config_pin(jzpc, pin, X2000_GPIO_PEPU, false);
3930 ingenic_config_pin(jzpc, pin, X2000_GPIO_PEPD, true);
3935 ingenic_config_pin(jzpc, pin, X2000_GPIO_PEPU, false);
3936 ingenic_config_pin(jzpc, pin, X2000_GPIO_PEPD, false);
3939 } else if (is_soc_or_above(jzpc, ID_X1830)) {
3946 regmap_write(jzpc->map, offt * jzpc->info->reg_offset +
3948 regmap_write(jzpc->map, offt * jzpc->info->reg_offset +
3951 regmap_write(jzpc->map, offt * jzpc->info->reg_offset +
3953 regmap_write(jzpc->map, offt * jzpc->info->reg_offset +
3957 } else if (is_soc_or_above(jzpc, ID_JZ4770)) {
3958 ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PEN, !bias);
3959 } else if (is_soc_or_above(jzpc, ID_JZ4740)) {
3960 ingenic_config_pin(jzpc, pin, JZ4740_GPIO_PULL_DIS, !bias);
3962 ingenic_config_pin(jzpc, pin, JZ4730_GPIO_GPPUR, bias);
3966 static void ingenic_set_schmitt_trigger(struct ingenic_pinctrl *jzpc,
3969 if (is_soc_or_above(jzpc, ID_X2000))
3970 ingenic_config_pin(jzpc, pin, X2000_GPIO_SMT, enable);
3972 ingenic_config_pin(jzpc, pin, X1830_GPIO_SMT, enable);
3975 static void ingenic_set_output_level(struct ingenic_pinctrl *jzpc,
3978 if (is_soc_or_above(jzpc, ID_JZ4770))
3979 ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT0, high);
3980 else if (is_soc_or_above(jzpc, ID_JZ4740))
3981 ingenic_config_pin(jzpc, pin, JZ4740_GPIO_DATA, high);
3983 ingenic_config_pin(jzpc, pin, JZ4730_GPIO_DATA, high);
3986 static void ingenic_set_slew_rate(struct ingenic_pinctrl *jzpc,
3989 if (is_soc_or_above(jzpc, ID_X2000))
3990 ingenic_config_pin(jzpc, pin, X2000_GPIO_SR, slew);
3992 ingenic_config_pin(jzpc, pin, X1830_GPIO_SR, slew);
3998 struct ingenic_pinctrl *jzpc = pinctrl_dev_get_drvdata(pctldev);
4023 dev_dbg(jzpc->dev, "disable pull-over for pin P%c%u\n",
4025 ingenic_set_bias(jzpc, pin, GPIO_PULL_DIS);
4029 if (!(jzpc->info->pull_ups[offt] & BIT(idx)))
4031 dev_dbg(jzpc->dev, "set pull-up for pin P%c%u\n",
4033 ingenic_set_bias(jzpc, pin, GPIO_PULL_UP);
4037 if (!(jzpc->info->pull_downs[offt] & BIT(idx)))
4039 dev_dbg(jzpc->dev, "set pull-down for pin P%c%u\n",
4041 ingenic_set_bias(jzpc, pin, GPIO_PULL_DOWN);
4045 if (!is_soc_or_above(jzpc, ID_X1830))
4048 ingenic_set_schmitt_trigger(jzpc, pin, arg);
4052 ret = pinctrl_gpio_direction_output(jzpc->gc,
4053 pin - jzpc->gc->base);
4057 ingenic_set_output_level(jzpc, pin, arg);
4061 if (!is_soc_or_above(jzpc, ID_X1830))
4064 ingenic_set_slew_rate(jzpc, pin, arg);
4154 static int __init ingenic_gpio_probe(struct ingenic_pinctrl *jzpc,
4158 struct device *dev = jzpc->dev;
4173 jzpc->gc = &jzgc->gc;
4175 jzgc->jzpc = jzpc;
4176 jzgc->reg_base = bank * jzpc->info->reg_offset;
4231 struct ingenic_pinctrl *jzpc;
4246 jzpc = devm_kzalloc(dev, sizeof(*jzpc), GFP_KERNEL);
4247 if (!jzpc)
4262 jzpc->map = devm_regmap_init_mmio(dev, base, ®map_config);
4263 if (IS_ERR(jzpc->map)) {
4265 return PTR_ERR(jzpc->map);
4268 jzpc->dev = dev;
4269 jzpc->info = chip_info;
4282 pctl_desc->pins = jzpc->pdesc = devm_kcalloc(&pdev->dev,
4283 pctl_desc->npins, sizeof(*jzpc->pdesc), GFP_KERNEL);
4284 if (!jzpc->pdesc)
4288 jzpc->pdesc[i].number = i;
4289 jzpc->pdesc[i].name = kasprintf(GFP_KERNEL, "P%c%d",
4294 jzpc->pctl = devm_pinctrl_register(dev, pctl_desc, jzpc);
4295 if (IS_ERR(jzpc->pctl)) {
4297 return PTR_ERR(jzpc->pctl);
4304 err = pinctrl_generic_add_group(jzpc->pctl, grp->name, grp->pins, grp->npins,
4315 err = pinmux_generic_add_function(jzpc->pctl, func->name,
4325 dev_set_drvdata(dev, jzpc->map);
4329 err = ingenic_gpio_probe(jzpc, fwnode);