pinctrl/nuvoton/pinctrl-npcm8xx.c

2338 static int npcm8xx_gpio_fw(struct npcm8xx_pinctrl *pctrl)
2341 	struct device *dev = pctrl->dev;
2347 		pctrl->gpio_bank[id].base = fwnode_iomap(child, 0);
2348 		if (!pctrl->gpio_bank[id].base)
2351 		ret = bgpio_init(&pctrl->gpio_bank[id].gc, dev, 4,
2352 				 pctrl->gpio_bank[id].base + NPCM8XX_GP_N_DIN,
2353 				 pctrl->gpio_bank[id].base + NPCM8XX_GP_N_DOUT,
2356 				 pctrl->gpio_bank[id].base + NPCM8XX_GP_N_IEM,
2369 		pctrl->gpio_bank[id].irq = ret;
2370 		pctrl->gpio_bank[id].irq_chip = npcmgpio_irqchip;
2371 		pctrl->gpio_bank[id].irqbase = id * NPCM8XX_GPIO_PER_BANK;
2372 		pctrl->gpio_bank[id].pinctrl_id = args.args[0];
2373 		pctrl->gpio_bank[id].gc.base = -1;
2374 		pctrl->gpio_bank[id].gc.ngpio = args.args[2];
2375 		pctrl->gpio_bank[id].gc.owner = THIS_MODULE;
2376 		pctrl->gpio_bank[id].gc.parent = dev;
2377 		pctrl->gpio_bank[id].gc.fwnode = child;
2378 		pctrl->gpio_bank[id].gc.label = devm_kasprintf(dev, GFP_KERNEL, "%pfw", child);
2379 		pctrl->gpio_bank[id].gc.dbg_show = npcmgpio_dbg_show;
2380 		pctrl->gpio_bank[id].direction_input = pctrl->gpio_bank[id].gc.direction_input;
2381 		pctrl->gpio_bank[id].gc.direction_input = npcmgpio_direction_input;
2382 		pctrl->gpio_bank[id].direction_output = pctrl->gpio_bank[id].gc.direction_output;
2383 		pctrl->gpio_bank[id].gc.direction_output = npcmgpio_direction_output;
2384 		pctrl->gpio_bank[id].request = pctrl->gpio_bank[id].gc.request;
2385 		pctrl->gpio_bank[id].gc.request = npcmgpio_gpio_request;
2386 		pctrl->gpio_bank[id].gc.free = pinctrl_gpio_free;
2388 			pctrl->gpio_bank[id].debounce.set_val[i] = false;
2389 		pctrl->gpio_bank[id].gc.add_pin_ranges = npcmgpio_add_pin_ranges;
2393 	pctrl->bank_num = id;
2397 static int npcm8xx_gpio_register(struct npcm8xx_pinctrl *pctrl)
2401 	for (id = 0 ; id < pctrl->bank_num ; id++) {
2404 		girq = &pctrl->gpio_bank[id].gc.irq;
2405 		girq->chip = &pctrl->gpio_bank[id].irq_chip;
2408 		girq->parents = devm_kcalloc(pctrl->dev, girq->num_parents,
2414 		girq->parents[0] = pctrl->gpio_bank[id].irq;
2417 		ret = devm_gpiochip_add_data(pctrl->dev,
2418 					     &pctrl->gpio_bank[id].gc,
2419 					     &pctrl->gpio_bank[id]);
2421 			return dev_err_probe(pctrl->dev, ret, "Failed to add GPIO chip %u\n", id);
2430 	struct npcm8xx_pinctrl *pctrl;
2433 	pctrl = devm_kzalloc(dev, sizeof(*pctrl), GFP_KERNEL);
2434 	if (!pctrl)
2437 	pctrl->dev = dev;
2438 	platform_set_drvdata(pdev, pctrl);
2440 	pctrl->gcr_regmap =
2442 	if (IS_ERR(pctrl->gcr_regmap))
2443 		return dev_err_probe(dev, PTR_ERR(pctrl->gcr_regmap),
2446 	ret = npcm8xx_gpio_fw(pctrl);
2451 	pctrl->pctldev = devm_pinctrl_register(dev, &npcm8xx_pinctrl_desc, pctrl);
2452 	if (IS_ERR(pctrl->pctldev))
2453 		return dev_err_probe(dev, PTR_ERR(pctrl->pctldev),
2456 	ret = npcm8xx_gpio_register(pctrl);