drivers/parisc/sba_iommu.c

1108 sba_get_pat_resources(struct sba_device *sba_dev)
1527 static void __iomem *ioc_remap(struct sba_device *sba_dev, unsigned int offset)
1529 	return ioremap(sba_dev->dev->hpa.start + offset, SBA_FUNC_SIZE);
1532 static void sba_hw_init(struct sba_device *sba_dev)
1582 	if (!IS_PLUTO(sba_dev->dev)) {
1583 		ioc_ctl = READ_REG(sba_dev->sba_hpa+IOC_CTRL);
1585 			__func__, sba_dev->sba_hpa, ioc_ctl);
1591 		WRITE_REG(ioc_ctl, sba_dev->sba_hpa+IOC_CTRL);
1594 		ioc_ctl = READ_REG64(sba_dev->sba_hpa+IOC_CTRL);
1599 	if (IS_ASTRO(sba_dev->dev)) {
1601 		sba_dev->ioc[0].ioc_hpa = ioc_remap(sba_dev, ASTRO_IOC_OFFSET);
1604 		sba_dev->chip_resv.name = "Astro Intr Ack";
1605 		sba_dev->chip_resv.start = PCI_F_EXTEND | 0xfef00000UL;
1606 		sba_dev->chip_resv.end   = PCI_F_EXTEND | (0xff000000UL - 1) ;
1607 		err = request_resource(&iomem_resource, &(sba_dev->chip_resv));
1610 	} else if (IS_PLUTO(sba_dev->dev)) {
1613 		sba_dev->ioc[0].ioc_hpa = ioc_remap(sba_dev, PLUTO_IOC_OFFSET);
1616 		sba_dev->chip_resv.name = "Pluto Intr/PIOP/VGA";
1617 		sba_dev->chip_resv.start = PCI_F_EXTEND | 0xfee00000UL;
1618 		sba_dev->chip_resv.end   = PCI_F_EXTEND | (0xff200000UL - 1);
1619 		err = request_resource(&iomem_resource, &(sba_dev->chip_resv));
1622 		sba_dev->iommu_resv.name = "IOVA Space";
1623 		sba_dev->iommu_resv.start = 0x40000000UL;
1624 		sba_dev->iommu_resv.end   = 0x50000000UL - 1;
1625 		err = request_resource(&iomem_resource, &(sba_dev->iommu_resv));
1629 		sba_dev->ioc[0].ioc_hpa = ioc_remap(sba_dev, IKE_IOC_OFFSET(0));
1630 		sba_dev->ioc[1].ioc_hpa = ioc_remap(sba_dev, IKE_IOC_OFFSET(1));
1637 	sba_dev->num_ioc = num_ioc;
1639 		void __iomem *ioc_hpa = sba_dev->ioc[i].ioc_hpa;
1650 			if (IS_PLUTO(sba_dev->dev)) {
1667 		READ_REG(sba_dev->ioc[i].ioc_hpa + ROPE7_CTL);
1671 				(unsigned long) READ_REG(sba_dev->ioc[i].ioc_hpa + 0x40),
1672 				(unsigned long) READ_REG(sba_dev->ioc[i].ioc_hpa + 0x50)
1675 				(unsigned long) READ_REG(sba_dev->ioc[i].ioc_hpa + 0x108),
1676 				(unsigned long) READ_REG(sba_dev->ioc[i].ioc_hpa + 0x400)
1679 		if (IS_PLUTO(sba_dev->dev)) {
1680 			sba_ioc_init_pluto(sba_dev->dev, &(sba_dev->ioc[i]), i);
1682 			sba_ioc_init(sba_dev->dev, &(sba_dev->ioc[i]), i);
1688 sba_common_init(struct sba_device *sba_dev)
1695 	sba_dev->next = sba_list;
1696 	sba_list = sba_dev;
1698 	for(i=0; i< sba_dev->num_ioc; i++) {
1707 		res_size = sba_dev->ioc[i].pdir_size/sizeof(u64); /* entries */
1718 		sba_dev->ioc[i].res_size = res_size;
1719 		sba_dev->ioc[i].res_map = (char *) __get_free_pages(GFP_KERNEL, get_order(res_size));
1722 		iterate_pages( sba_dev->ioc[i].res_map, res_size,
1726 		if (NULL == sba_dev->ioc[i].res_map)
1732 		memset(sba_dev->ioc[i].res_map, 0, res_size);
1734 		sba_dev->ioc[i].res_hint = (unsigned long *)
1735 				&(sba_dev->ioc[i].res_map[L1_CACHE_BYTES]);
1739 		sba_dev->ioc[i].res_map[0] = 0x80;
1740 		sba_dev->ioc[i].pdir_base[0] = (__force __le64) 0xeeffc0addbba0080ULL;
1749 			long *p_start = (long *) &(sba_dev->ioc[i].res_map[idx_start]);
1750 			long *p_end   = (long *) &(sba_dev->ioc[i].res_map[idx_end]);
1759 		iterate_pages( sba_dev->ioc[i].res_map, res_size,
1761 		iterate_pages( sba_dev->ioc[i].pdir_base, sba_dev->ioc[i].pdir_size,
1766 			__func__, i, res_size, sba_dev->ioc[i].res_map);
1769 	spin_lock_init(&sba_dev->sba_lock);
1789 	struct sba_device *sba_dev = sba_list;
1790 	struct ioc *ioc = &sba_dev->ioc[0];	/* FIXME: Multi-IOC support! */
1798 		   sba_dev->name,
1799 		   (sba_dev->hw_rev & 0x7) + 1,
1800 		   (sba_dev->hw_rev & 0x18) >> 3);
1809 		   READ_REG32(sba_dev->sba_hpa + LMMIO_DIST_BASE),
1810 		   READ_REG32(sba_dev->sba_hpa + LMMIO_DIST_MASK),
1811 		   READ_REG32(sba_dev->sba_hpa + LMMIO_DIST_ROUTE));
1816 			   READ_REG32(sba_dev->sba_hpa + LMMIO_DIRECT0_BASE  + i*0x18),
1817 			   READ_REG32(sba_dev->sba_hpa + LMMIO_DIRECT0_MASK  + i*0x18),
1818 			   READ_REG32(sba_dev->sba_hpa + LMMIO_DIRECT0_ROUTE + i*0x18));
1860 	struct sba_device *sba_dev = sba_list;
1861 	struct ioc *ioc = &sba_dev->ioc[0];	/* FIXME: Multi-IOC support! */
1895 	struct sba_device *sba_dev;
1944 	sba_dev = kzalloc(sizeof(struct sba_device), GFP_KERNEL);
1945 	if (!sba_dev) {
1950 	parisc_set_drvdata(dev, sba_dev);
1953 		spin_lock_init(&(sba_dev->ioc[i].res_lock));
1955 	sba_dev->dev = dev;
1956 	sba_dev->hw_rev = func_class;
1957 	sba_dev->name = dev->name;
1958 	sba_dev->sba_hpa = sba_addr;
1960 	sba_get_pat_resources(sba_dev);
1961 	sba_hw_init(sba_dev);
1962 	sba_common_init(sba_dev);
2007 	struct parisc_device *sba_dev = parisc_parent(pci_hba);
2008 	struct sba_device *sba = dev_get_drvdata(&sba_dev->dev);
2009 	char t = sba_dev->id.hw_type;
2028 	struct parisc_device *sba_dev = parisc_parent(pci_hba);
2029 	struct sba_device *sba = dev_get_drvdata(&sba_dev->dev);
2030 	char t = sba_dev->id.hw_type;
2071 	struct parisc_device *sba_dev = parisc_parent(pci_hba);
2072 	struct sba_device *sba = dev_get_drvdata(&sba_dev->dev);
2073 	char t = sba_dev->id.hw_type;