intel/ipw2x00/ipw2200.c

23 #include "ipw.h"
295 static u8 _ipw_read_reg8(struct ipw_priv *ipw, u32 reg);
326 static inline void _ipw_write8(struct ipw_priv *ipw, unsigned long ofs,
329 	writeb(val, ipw->hw_base + ofs);
333 #define ipw_write8(ipw, ofs, val) do { \
336 	_ipw_write8(ipw, ofs, val); \
340 static inline void _ipw_write16(struct ipw_priv *ipw, unsigned long ofs,
343 	writew(val, ipw->hw_base + ofs);
347 #define ipw_write16(ipw, ofs, val) do { \
350 	_ipw_write16(ipw, ofs, val); \
354 static inline void _ipw_write32(struct ipw_priv *ipw, unsigned long ofs,
357 	writel(val, ipw->hw_base + ofs);
361 #define ipw_write32(ipw, ofs, val) do { \
364 	_ipw_write32(ipw, ofs, val); \
368 static inline u8 _ipw_read8(struct ipw_priv *ipw, unsigned long ofs)
370 	return readb(ipw->hw_base + ofs);
374 #define ipw_read8(ipw, ofs) ({ \
377 	_ipw_read8(ipw, ofs); \
381 static inline u32 _ipw_read32(struct ipw_priv *ipw, unsigned long ofs)
383 	return readl(ipw->hw_base + ofs);
387 #define ipw_read32(ipw, ofs) ({ \
390 	_ipw_read32(ipw, ofs); \
1166  * of this device driver (i.e. a new file in /sys/bus/pci/drivers/ipw/)
1169  * See the level definitions in ipw for details.
2986  * the ipw hardware.  It assumes the buffer has all the bits for the
3077 	/* load new ipw uCode */
5049  * + A list of pre-allocated SKBs is stored in ipw->rxq->rx_free.  When
5050  *   ipw->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
5051  *   to replensish the ipw->rxq->rx_free.
5053  *   ipw->rxq is replenished and the READ INDEX is updated (updating the
5056  *   detached from the ipw->rxq.  The driver 'processed' index is updated.
5057  * + The Host/Firmware ipw->rxq is replenished at tasklet time from the rx_free
5058  *   list. If there are no allocated buffers in ipw->rxq->rx_free, the READ
5059  *   INDEX is not incremented and ipw->status(RX_STALLED) is set.  If there
8171 		 * ipw header and 802.11 frame */
8175 		/* Advance past the ipw packet header to the 802.11 frame */