net/phy/microchip_t1.c

108 static int lan937x_dsp_workaround(struct phy_device *phydev, u16 ereg, u8 bank)
114 	mutex_lock(&phydev->lock);
116 	rc = phy_read(phydev, LAN87XX_EXT_REG_CTL);
130 		rc = phy_write(phydev, LAN87XX_EXT_REG_CTL, val);
134 	mutex_unlock(&phydev->lock);
139 static int access_ereg(struct phy_device *phydev, u8 mode, u8 bank,
150 			rc = phy_write(phydev, offset, val);
152 			rc = phy_read(phydev, offset);
158 		rc = phy_write(phydev, LAN87XX_EXT_REG_WR_DATA, val);
168 	if (phydev->phy_id == PHY_ID_LAN937X) {
169 		rc = lan937x_dsp_workaround(phydev, ereg, bank);
174 	rc = phy_write(phydev, LAN87XX_EXT_REG_CTL, ereg);
179 		rc = phy_read(phydev, LAN87XX_EXT_REG_RD_DATA);
184 static int access_ereg_modify_changed(struct phy_device *phydev,
192 	rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, bank, offset, val);
197 	rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE, bank, offset, new);
202 static int access_smi_poll_timeout(struct phy_device *phydev,
207 	return phy_read_poll_timeout(phydev, offset, val, (val & mask) == clr,
211 static int lan87xx_config_rgmii_delay(struct phy_device *phydev)
215 	if (!phy_interface_is_rgmii(phydev))
218 	rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
223 	switch (phydev->interface) {
244 	return access_ereg(phydev, PHYACC_ATTR_MODE_WRITE,
248 static int lan87xx_phy_init_cmd(struct phy_device *phydev,
256 			ret = access_smi_poll_timeout(phydev,
261 			ret = access_ereg(phydev, cmd_seq[i].mode,
272 static int lan87xx_phy_init(struct phy_device *phydev)
433 	rc = genphy_soft_reset(phydev);
438 	rc = lan87xx_phy_init_cmd(phydev, hw_init, ARRAY_SIZE(hw_init));
442 	rc = genphy_read_master_slave(phydev);
446 	/* The following squence needs to run only if phydev is in
449 	if (phydev->master_slave_state == MASTER_SLAVE_STATE_SLAVE) {
450 		rc = lan87xx_phy_init_cmd(phydev, slave_init,
456 	rc = lan87xx_phy_init_cmd(phydev, phy_init, ARRAY_SIZE(phy_init));
460 	return lan87xx_config_rgmii_delay(phydev);
463 static int lan87xx_phy_config_intr(struct phy_device *phydev)
467 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
469 		rc = phy_write(phydev, LAN87XX_INTERRUPT_MASK, val);
473 		rc = phy_read(phydev, LAN87XX_INTERRUPT_SOURCE);
477 		rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE,
483 		rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
491 		rc = phy_write(phydev, LAN87XX_INTERRUPT_MASK, val);
496 		rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE,
500 		rc = phy_write(phydev, LAN87XX_INTERRUPT_MASK, val);
504 		rc = phy_read(phydev, LAN87XX_INTERRUPT_SOURCE);
508 		rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE,
514 		rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
522 static irqreturn_t lan87xx_handle_interrupt(struct phy_device *phydev)
526 	irq_status  = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
530 		phy_error(phydev);
534 	irq_status = phy_read(phydev, LAN87XX_INTERRUPT_SOURCE);
536 		phy_error(phydev);
543 	phy_trigger_machine(phydev);
548 static int lan87xx_config_init(struct phy_device *phydev)
550 	int rc = lan87xx_phy_init(phydev);
555 static int microchip_cable_test_start_common(struct phy_device *phydev)
562 	bmcr = phy_read(phydev, MII_BMCR);
566 	bmsr = phy_read(phydev, MII_BMSR);
572 		ret =  phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);
575 		ret = genphy_soft_reset(phydev);
587 static int lan87xx_cable_test_start(struct phy_device *phydev)
617 	rc = microchip_cable_test_start_common(phydev);
623 	rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_SMI,
629 	rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_SMI,
636 		rc = access_ereg_modify_changed(phydev, PHYACC_ATTR_BANK_AFE,
640 		rc = access_ereg_modify_changed(phydev, PHYACC_ATTR_BANK_SMI,
646 		rc = access_ereg_modify_changed(phydev, PHYACC_ATTR_BANK_SMI,
654 			rc = access_ereg_modify_changed(phydev,
662 			rc = access_ereg(phydev, cable_test[i].mode,
690 static int lan87xx_cable_test_report(struct phy_device *phydev)
702 	gain_idx = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
705 	pos_peak = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
707 	neg_peak = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
709 	pos_peak_time = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
711 	neg_peak_time = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
748 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
754 static int lan87xx_cable_test_get_status(struct phy_device *phydev,
762 	rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_DSP,
769 		rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE,
777 		return lan87xx_cable_test_report(phydev);
783 static int lan87xx_read_status(struct phy_device *phydev)
787 	rc = phy_read(phydev, T1_MODE_STAT_REG);
792 		phydev->link = 1;
794 		phydev->link = 0;
796 	phydev->speed = SPEED_UNKNOWN;
797 	phydev->duplex = DUPLEX_UNKNOWN;
798 	phydev->pause = 0;
799 	phydev->asym_pause = 0;
801 	rc = genphy_read_master_slave(phydev);
805 	rc = genphy_read_status_fixed(phydev);
812 static int lan87xx_config_aneg(struct phy_device *phydev)
817 	switch (phydev->master_slave_set) {
827 		phydev_warn(phydev, "Unsupported Master/Slave mode\n");
831 	ret = phy_modify_changed(phydev, MII_CTRL1000, CTL1000_AS_MASTER, ctl);
833 		return phy_init_hw(phydev);
838 static int lan87xx_get_sqi(struct phy_device *phydev)
843 	rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE,
848 	rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
858 static int lan87xx_get_sqi_max(struct phy_device *phydev)