intel/ixgbe/ixgbe_main.c

3600 		else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3727 		u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3893 	u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3921 	u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3957 		if (adapter->ring_feature[RING_F_RSS].mask)
3967 			else if (adapter->ring_feature[RING_F_VMDQ].mask ==
4180 	int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4248 	switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5106 		u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5373 	u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
5652 		switch (adapter->ring_feature[RING_F_VMDQ].mask) {
6352 	adapter->ring_feature[RING_F_RSS].limit = rss;
6357 	adapter->ring_feature[RING_F_FDIR].limit = fdir;
6359 	adapter->ring_feature[RING_F_VMDQ].limit = 1;
6408 		adapter->ring_feature[RING_F_FDIR].limit = 0;
7670 	struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
8647 	f = &adapter->ring_feature[RING_F_FCOE];
9443 	struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9876 	if (!adapter->ring_feature[RING_F_VMDQ].offset)
9880 	adapter->ring_feature[RING_F_RSS].limit = rss;
9881 	adapter->ring_feature[RING_F_VMDQ].limit = 1;
9933 		    (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
10157 		adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools;
11094 		adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;