intel/i40e/i40e_ptp.c

141 static int i40e_ptp_set_pins(struct i40e_pf *pf,
152 	struct i40e_pf *pf = container_of(work, struct i40e_pf,
154 	struct i40e_hw *hw = &pf->hw;
172 	ptp_clock_event(pf->ptp_clock, &event);
189  * @pf: board private structure
196 static enum i40e_can_set_pins i40e_can_set_pins(struct i40e_pf *pf)
198 	if (!i40e_is_ptp_pin_dev(&pf->hw)) {
199 		dev_warn(&pf->pdev->dev,
204 	if (!pf->ptp_pins) {
205 		dev_warn(&pf->pdev->dev,
210 	if (pf->hw.pf_id) {
211 		dev_warn(&pf->pdev->dev,
221  * @pf: Board private structure
223  * This function resets timing events for pf.
225 static void i40_ptp_reset_timing_events(struct i40e_pf *pf)
229 	spin_lock_bh(&pf->ptp_rx_lock);
232 		rd32(&pf->hw, I40E_PRTTSYN_RXTIME_L(i));
233 		rd32(&pf->hw, I40E_PRTTSYN_RXTIME_H(i));
234 		pf->latch_events[i] = 0;
237 	rd32(&pf->hw, I40E_PRTTSYN_TXTIME_L);
238 	rd32(&pf->hw, I40E_PRTTSYN_TXTIME_H);
240 	pf->tx_hwtstamp_timeouts = 0;
241 	pf->tx_hwtstamp_skipped = 0;
242 	pf->rx_hwtstamp_cleared = 0;
243 	pf->latch_event_flags = 0;
244 	spin_unlock_bh(&pf->ptp_rx_lock);
273  * @pf: Board private structure
281 static void i40e_ptp_read(struct i40e_pf *pf, struct timespec64 *ts,
284 	struct i40e_hw *hw = &pf->hw;
301  * @pf: Board private structure
308 static void i40e_ptp_write(struct i40e_pf *pf, const struct timespec64 *ts)
310 	struct i40e_hw *hw = &pf->hw;
349 	struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
350 	struct i40e_hw *hw = &pf->hw;
354 	base_adj = I40E_PTP_40GB_INCVAL * READ_ONCE(pf->ptp_adj_mult);
366  * @pf: the PF private data structure
370 static void i40e_ptp_set_1pps_signal_hw(struct i40e_pf *pf)
372 	struct i40e_hw *hw = &pf->hw;
380 	i40e_ptp_read(pf, &now, NULL);
404 	struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
405 	struct i40e_hw *hw = &pf->hw;
407 	mutex_lock(&pf->tmreg_lock);
429 		i40e_ptp_read(pf, &now, NULL);
431 		i40e_ptp_write(pf, (const struct timespec64 *)&now);
432 		i40e_ptp_set_1pps_signal_hw(pf);
435 	mutex_unlock(&pf->tmreg_lock);
452 	struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
454 	mutex_lock(&pf->tmreg_lock);
455 	i40e_ptp_read(pf, ts, sts);
456 	mutex_unlock(&pf->tmreg_lock);
472 	struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
474 	mutex_lock(&pf->tmreg_lock);
475 	i40e_ptp_write(pf, ts);
476 	mutex_unlock(&pf->tmreg_lock);
494 	struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
497 		i40e_ptp_set_1pps_signal_hw(pf);
528  * @pf: private board structure
536 static int i40e_ptp_enable_pin(struct i40e_pf *pf, unsigned int chan,
544 	if (pf->hw.pf_id)
548 	pins.sdp3_2 = pf->ptp_pins->sdp3_2;
549 	pins.sdp3_3 = pf->ptp_pins->sdp3_3;
550 	pins.gpio_4 = pf->ptp_pins->gpio_4;
559 		pin_index = ptp_find_pin(pf->ptp_clock, func, chan);
584 	return i40e_ptp_set_pins(pf, &pins) ? -EINVAL : 0;
599 	struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
620 	return i40e_ptp_enable_pin(pf, chan, func, on);
625  * @pf: the PF data structure
635 static u32 i40e_ptp_get_rx_events(struct i40e_pf *pf)
637 	struct i40e_hw *hw = &pf->hw;
642 	new_latch_events = prttsyn_stat & ~pf->latch_event_flags;
655 			pf->latch_events[i] = jiffies;
659 	pf->latch_event_flags = prttsyn_stat;
666  * @pf: The PF private data structure
673 void i40e_ptp_rx_hang(struct i40e_pf *pf)
675 	struct i40e_hw *hw = &pf->hw;
683 	if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_rx)
686 	spin_lock_bh(&pf->ptp_rx_lock);
689 	i40e_ptp_get_rx_events(pf);
698 		if ((pf->latch_event_flags & BIT(i)) &&
699 		    time_is_before_jiffies(pf->latch_events[i] + HZ)) {
701 			pf->latch_event_flags &= ~BIT(i);
706 	spin_unlock_bh(&pf->ptp_rx_lock);
715 		dev_dbg(&pf->pdev->dev,
720 	pf->rx_hwtstamp_cleared += cleared;
725  * @pf: The PF private data structure
732 void i40e_ptp_tx_hang(struct i40e_pf *pf)
736 	if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_tx)
740 	if (!test_bit(__I40E_PTP_TX_IN_PROGRESS, pf->state))
747 	if (time_is_before_jiffies(pf->ptp_tx_start + HZ)) {
748 		skb = pf->ptp_tx_skb;
749 		pf->ptp_tx_skb = NULL;
750 		clear_bit_unlock(__I40E_PTP_TX_IN_PROGRESS, pf->state);
754 		pf->tx_hwtstamp_timeouts++;
760  * @pf: Board private structure
766 void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf)
769 	struct sk_buff *skb = pf->ptp_tx_skb;
770 	struct i40e_hw *hw = &pf->hw;
774 	if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_tx)
778 	if (!pf->ptp_tx_skb)
792 	pf->ptp_tx_skb = NULL;
793 	clear_bit_unlock(__I40E_PTP_TX_IN_PROGRESS, pf->state);
802  * @pf: Board private structure
812 void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index)
821 	if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_rx)
824 	hw = &pf->hw;
826 	spin_lock_bh(&pf->ptp_rx_lock);
829 	prttsyn_stat = i40e_ptp_get_rx_events(pf);
833 		spin_unlock_bh(&pf->ptp_rx_lock);
838 	pf->latch_event_flags &= ~BIT(index);
843 	spin_unlock_bh(&pf->ptp_rx_lock);
852  * @pf: Board private structure
858 void i40e_ptp_set_increment(struct i40e_pf *pf)
861 	struct i40e_hw *hw = &pf->hw;
867 	i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
884 			dev_warn(&pf->pdev->dev,
910 	WRITE_ONCE(pf->ptp_adj_mult, mult);
916  * @pf: Board private structure
923 int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr)
925 	struct hwtstamp_config *config = &pf->tstamp_config;
927 	if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags))
936  * @pf: Board private structure
940 static void i40e_ptp_free_pins(struct i40e_pf *pf)
942 	if (i40e_is_ptp_pin_dev(&pf->hw)) {
943 		kfree(pf->ptp_pins);
944 		kfree(pf->ptp_caps.pin_config);
945 		pf->ptp_pins = NULL;
1033  * @pf: Board private structure
1037 static void i40e_ptp_set_pins_hw(struct i40e_pf *pf)
1039 	const struct i40e_ptp_pins_settings *pins = pf->ptp_pins;
1040 	struct i40e_hw *hw = &pf->hw;
1056 	dev_info(&pf->pdev->dev,
1065  * @pf: Board private structure
1071 static int i40e_ptp_set_pins(struct i40e_pf *pf,
1074 	enum i40e_can_set_pins pin_caps = i40e_can_set_pins(pf);
1083 		pins->sdp3_2 = pf->ptp_pins->sdp3_2;
1085 		pins->sdp3_3 = pf->ptp_pins->sdp3_3;
1087 		pins->gpio_4 = pf->ptp_pins->gpio_4;
1105 		dev_warn(&pf->pdev->dev,
1113 	memcpy(pf->ptp_pins, pins, sizeof(*pins));
1114 	i40e_ptp_set_pins_hw(pf);
1115 	i40_ptp_reset_timing_events(pf);
1122  * @pf: Board private structure
1126 int i40e_ptp_alloc_pins(struct i40e_pf *pf)
1128 	if (!i40e_is_ptp_pin_dev(&pf->hw))
1131 	pf->ptp_pins =
1134 	if (!pf->ptp_pins) {
1135 		dev_warn(&pf->pdev->dev, "Cannot allocate memory for PTP pins structure.\n");
1139 	pf->ptp_pins->sdp3_2 = off;
1140 	pf->ptp_pins->sdp3_3 = off;
1141 	pf->ptp_pins->gpio_4 = off;
1142 	pf->ptp_pins->led2_0 = high;
1143 	pf->ptp_pins->led2_1 = high;
1144 	pf->ptp_pins->led3_0 = high;
1145 	pf->ptp_pins->led3_1 = high;
1148 	if (pf->hw.pf_id)
1151 	i40e_ptp_init_leds_hw(&pf->hw);
1152 	i40e_ptp_set_pins_hw(pf);
1159  * @pf: Board private structure
1169 static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf,
1172 	struct i40e_hw *hw = &pf->hw;
1188 	INIT_WORK(&pf->ptp_extts0_work, i40e_ptp_extts0_work);
1192 		pf->ptp_tx = false;
1195 		pf->ptp_tx = true;
1203 		pf->ptp_rx = false;
1214 		if (!test_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps))
1216 		pf->ptp_rx = true;
1228 		if (!test_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps))
1234 		pf->ptp_rx = true;
1237 		if (test_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps)) {
1251 	spin_lock_bh(&pf->ptp_rx_lock);
1258 	pf->latch_event_flags = 0;
1259 	spin_unlock_bh(&pf->ptp_rx_lock);
1263 	if (pf->ptp_tx)
1270 	if (pf->ptp_tx)
1280 	 * ignore Rx timestamps via the pf->ptp_rx flag.
1294  * @pf: Board private structure
1306 int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr)
1311 	if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags))
1317 	err = i40e_ptp_set_timestamp_mode(pf, &config);
1322 	pf->tstamp_config = config;
1330  * @pf: private board structure
1335 static int i40e_init_pin_config(struct i40e_pf *pf)
1339 	pf->ptp_caps.n_pins = 3;
1340 	pf->ptp_caps.n_ext_ts = 2;
1341 	pf->ptp_caps.pps = 1;
1342 	pf->ptp_caps.n_per_out = 2;
1344 	pf->ptp_caps.pin_config = kcalloc(pf->ptp_caps.n_pins,
1345 					  sizeof(*pf->ptp_caps.pin_config),
1347 	if (!pf->ptp_caps.pin_config)
1350 	for (i = 0; i < pf->ptp_caps.n_pins; i++) {
1351 		snprintf(pf->ptp_caps.pin_config[i].name,
1352 			 sizeof(pf->ptp_caps.pin_config[i].name),
1354 		pf->ptp_caps.pin_config[i].index = sdp_desc[i].index;
1355 		pf->ptp_caps.pin_config[i].func = PTP_PF_NONE;
1356 		pf->ptp_caps.pin_config[i].chan = sdp_desc[i].chan;
1359 	pf->ptp_caps.verify = i40e_ptp_verify;
1360 	pf->ptp_caps.enable = i40e_ptp_feature_enable;
1362 	pf->ptp_caps.pps = 1;
1369  * @pf: Board private structure
1377 static long i40e_ptp_create_clock(struct i40e_pf *pf)
1380 	if (!IS_ERR_OR_NULL(pf->ptp_clock))
1383 	strscpy(pf->ptp_caps.name, i40e_driver_name,
1384 		sizeof(pf->ptp_caps.name) - 1);
1385 	pf->ptp_caps.owner = THIS_MODULE;
1386 	pf->ptp_caps.max_adj = 999999999;
1387 	pf->ptp_caps.adjfine = i40e_ptp_adjfine;
1388 	pf->ptp_caps.adjtime = i40e_ptp_adjtime;
1389 	pf->ptp_caps.gettimex64 = i40e_ptp_gettimex;
1390 	pf->ptp_caps.settime64 = i40e_ptp_settime;
1391 	if (i40e_is_ptp_pin_dev(&pf->hw)) {
1392 		int err = i40e_init_pin_config(pf);
1399 	pf->ptp_clock = ptp_clock_register(&pf->ptp_caps, &pf->pdev->dev);
1400 	if (IS_ERR(pf->ptp_clock))
1401 		return PTR_ERR(pf->ptp_clock);
1407 	pf->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
1408 	pf->tstamp_config.tx_type = HWTSTAMP_TX_OFF;
1411 	ktime_get_real_ts64(&pf->ptp_prev_hw_time);
1412 	pf->ptp_reset_start = ktime_get();
1419  * @pf: Board private structure
1421  * Read the current PTP time and save it into pf->ptp_prev_hw_time. This should
1426 void i40e_ptp_save_hw_time(struct i40e_pf *pf)
1429 	if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags))
1432 	i40e_ptp_gettimex(&pf->ptp_caps, &pf->ptp_prev_hw_time, NULL);
1434 	pf->ptp_reset_start = ktime_get();
1439  * @pf: Board private structure
1442  * hardware time as pf->ptp_prev_hw_time. To be as accurate as possible,
1449 void i40e_ptp_restore_hw_time(struct i40e_pf *pf)
1451 	ktime_t delta = ktime_sub(ktime_get(), pf->ptp_reset_start);
1454 	timespec64_add_ns(&pf->ptp_prev_hw_time, ktime_to_ns(delta));
1457 	i40e_ptp_settime(&pf->ptp_caps, &pf->ptp_prev_hw_time);
1462  * @pf: Board private structure
1469  * pf->ptp_prev_hw_time to the current system time. During resets, it is
1473 void i40e_ptp_init(struct i40e_pf *pf)
1475 	struct net_device *netdev = pf->vsi[pf->lan_vsi]->netdev;
1476 	struct i40e_hw *hw = &pf->hw;
1486 		clear_bit(I40E_FLAG_PTP_ENA, pf->flags);
1487 		dev_info(&pf->pdev->dev, "%s: PTP not supported on %s\n",
1493 	mutex_init(&pf->tmreg_lock);
1494 	spin_lock_init(&pf->ptp_rx_lock);
1497 	err = i40e_ptp_create_clock(pf);
1499 		pf->ptp_clock = NULL;
1500 		dev_err(&pf->pdev->dev, "%s: ptp_clock_register failed\n",
1502 	} else if (pf->ptp_clock) {
1505 		if (pf->hw.debug_mask & I40E_DEBUG_LAN)
1506 			dev_info(&pf->pdev->dev, "PHC enabled\n");
1507 		set_bit(I40E_FLAG_PTP_ENA, pf->flags);
1518 		i40e_ptp_set_increment(pf);
1521 		i40e_ptp_set_timestamp_mode(pf, &pf->tstamp_config);
1524 		i40e_ptp_restore_hw_time(pf);
1527 	i40e_ptp_set_1pps_signal_hw(pf);
1532  * @pf: Board private structure
1537 void i40e_ptp_stop(struct i40e_pf *pf)
1539 	struct i40e_hw *hw = &pf->hw;
1542 	clear_bit(I40E_FLAG_PTP_ENA, pf->flags);
1543 	pf->ptp_tx = false;
1544 	pf->ptp_rx = false;
1546 	if (pf->ptp_tx_skb) {
1547 		struct sk_buff *skb = pf->ptp_tx_skb;
1549 		pf->ptp_tx_skb = NULL;
1550 		clear_bit_unlock(__I40E_PTP_TX_IN_PROGRESS, pf->state);
1554 	if (pf->ptp_clock) {
1555 		ptp_clock_unregister(pf->ptp_clock);
1556 		pf->ptp_clock = NULL;
1557 		dev_info(&pf->pdev->dev, "%s: removed PHC on %s\n", __func__,
1558 			 pf->vsi[pf->lan_vsi]->netdev->name);
1561 	if (i40e_is_ptp_pin_dev(&pf->hw)) {
1576 	i40e_ptp_free_pins(pf);