atheros/atl1e/atl1e_hw.c

285 	s32 ret_val;
352 	ret_val = atl1e_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
353 	if (ret_val)
354 		return ret_val;
357 		ret_val = atl1e_write_phy_reg(hw, MII_CTRL1000,
359 		if (ret_val)
360 			return ret_val;
377 	int ret_val;
382 	ret_val = atl1e_write_phy_reg(hw, MII_BMCR, phy_data);
383 	if (ret_val) {
399 			return ret_val;
410 	s32 ret_val;
430 	ret_val = atl1e_write_phy_reg(hw, MII_DBG_ADDR, 0xB);
431 	if (ret_val)
432 		return ret_val;
433 	ret_val = atl1e_write_phy_reg(hw, MII_DBG_DATA, 0xBC00);
434 	if (ret_val)
435 		return ret_val;
437 	ret_val = atl1e_write_phy_reg(hw, MII_DBG_ADDR, 0);
438 	if (ret_val)
439 		return ret_val;
443 	ret_val = atl1e_write_phy_reg(hw, MII_DBG_DATA, phy_val);
444 	if (ret_val)
445 		return ret_val;
447 	ret_val = atl1e_write_phy_reg(hw, MII_DBG_ADDR, 0x12);
448 	if (ret_val)
449 		return ret_val;
450 	ret_val = atl1e_write_phy_reg(hw, MII_DBG_DATA, 0x4C04);
451 	if (ret_val)
452 		return ret_val;
454 	ret_val = atl1e_write_phy_reg(hw, MII_DBG_ADDR, 0x4);
455 	if (ret_val)
456 		return ret_val;
457 	ret_val = atl1e_write_phy_reg(hw, MII_DBG_DATA, 0x8BBB);
458 	if (ret_val)
459 		return ret_val;
461 	ret_val = atl1e_write_phy_reg(hw, MII_DBG_ADDR, 0x5);
462 	if (ret_val)
463 		return ret_val;
464 	ret_val = atl1e_write_phy_reg(hw, MII_DBG_DATA, 0x2C46);
465 	if (ret_val)
466 		return ret_val;
471 	ret_val = atl1e_write_phy_reg(hw, MII_INT_CTRL, 0xC00);
472 	if (ret_val) {
475 		return ret_val;
478 	ret_val = atl1e_phy_setup_autoneg_adv(hw);
479 	if (ret_val) {
482 		return ret_val;
486 	ret_val = atl1e_phy_commit(hw);
487 	if (ret_val) {
489 		return ret_val;
562 	s32 ret_val = 0;
571 	ret_val = atl1e_phy_init(hw);
573 	return ret_val;