net/dsa/mt7530.c

243 mt7530_read(struct mt7530_priv *priv, u32 reg)
296 	val = mt7530_read(priv, MT7530_ATC);
314 		reg[i] = mt7530_read(priv, MT7530_TSRA1 + (i * 4));
420 	xtal = mt7530_read(priv, MT753X_MTRAP) & MT7530_XTAL_MASK;
464 	val = mt7530_read(priv, MT7531_CREV);
465 	top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR);
466 	hwstrap = mt7530_read(priv, MT753X_TRAP);
475 	val = mt7530_read(priv, MT7531_PLLGP_EN);
480 	val = mt7530_read(priv, MT7531_PLLGP_EN);
484 	val = mt7530_read(priv, MT7531_PLLGP_CR0);
489 	val = mt7530_read(priv, MT7531_PLLGP_EN);
494 	val = mt7530_read(priv, MT7531_PLLGP_CR0);
502 		val = mt7530_read(priv, MT7531_PLLGP_CR0);
508 		val = mt7530_read(priv, MT7531_PLLGP_CR0);
516 	val = mt7530_read(priv, MT7531_PLLGP_CR0);
523 	val = mt7530_read(priv, MT7531_PLLGP_CR0);
534 	val = mt7530_read(priv, MT7531_PLLGP_CR0);
538 	val = mt7530_read(priv, MT7531_PLLGP_EN);
804 		data[i] = mt7530_read(priv, reg);
806 			hi = mt7530_read(priv, reg + 4);
881 	val = mt7530_read(priv, MT753X_MTRAP);
1608 		port_mask = (mt7530_read(priv, MT7530_ATRD) >> PORT_MAP)
1635 		port_mask = (mt7530_read(priv, MT7530_ATRD) >> PORT_MAP)
1666 	val = mt7530_read(priv, MT7530_VTCR);
1741 	val = mt7530_read(priv, MT7530_VAWD1);
1768 	val = mt7530_read(priv, MT7530_VAWD1);
1885 	val = mt7530_read(priv, MT753X_MIRROR_REG(priv->id));
1898 	val = mt7530_read(priv, MT7530_PCR_P(port));
1917 	val = mt7530_read(priv, MT7530_PCR_P(port));
1928 		val = mt7530_read(priv, MT753X_MIRROR_REG(priv->id));
1961 	return !!(mt7530_read(priv, MT7530_LED_GPIO_DATA) & bit);
1982 	return (mt7530_read(priv, MT7530_LED_GPIO_DIR) & bit) ?
2391 	id = mt7530_read(priv, MT7530_CREV);
2616 	id = mt7530_read(priv, MT7531_CREV);
2627 	val = mt7530_read(priv, MT7531_TOP_SIG_SR);
2799 	val = mt7530_read(priv, MT7531_CLKGEN_CTRL);
2971 	pmsr = mt7530_read(priv, MT7530_PMSR_P(port));
3059 	u32 eeecr = mt7530_read(priv, MT753X_PMEEECR_P(port));