dsa/b53/b53_serdes.c

42 static void b53_serdes_set_lane(struct b53_device *dev, u8 lane)
44 	if (dev->serdes_lane == lane)
47 	WARN_ON(lane > 1);
50 			     SERDES_XGXSBLK0_BLOCKADDRESS, lane);
51 	dev->serdes_lane = lane;
54 static void b53_serdes_write(struct b53_device *dev, u8 lane,
57 	b53_serdes_set_lane(dev, lane);
61 static u16 b53_serdes_read(struct b53_device *dev, u8 lane,
64 	b53_serdes_set_lane(dev, lane);
74 	u8 lane = pcs_to_b53_pcs(pcs)->lane;
77 	reg = b53_serdes_read(dev, lane, B53_SERDES_DIGITAL_CONTROL(1),
83 	b53_serdes_write(dev, lane, B53_SERDES_DIGITAL_CONTROL(1),
92 	u8 lane = pcs_to_b53_pcs(pcs)->lane;
95 	reg = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_BMCR),
98 	b53_serdes_write(dev, lane, B53_SERDES_MII_REG(MII_BMCR),
106 	u8 lane = pcs_to_b53_pcs(pcs)->lane;
109 	dig = b53_serdes_read(dev, lane, B53_SERDES_DIGITAL_STATUS,
111 	bmsr = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_BMSR),
142 	u8 lane = b53_serdes_map_lane(dev, port);
145 	if (lane == B53_INVALID_LANE)
148 	reg = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_BMCR),
154 	b53_serdes_write(dev, lane, B53_SERDES_MII_REG(MII_BMCR),
168 	u8 lane = b53_serdes_map_lane(dev, port);
170 	if (lane == B53_INVALID_LANE)
173 	switch (lane) {
175 		/* It appears lane 0 supports 2500base-X and 1000base-X */
181 		/* It appears lane 1 only supports 1000base-X and SGMII */
198 	u8 lane = b53_serdes_map_lane(dev, port);
200 	if (lane == B53_INVALID_LANE || lane >= B53_N_PCS ||
201 	    !dev->pcs[lane].dev)
208 	return &dev->pcs[lane].pcs;
214 	u8 lane = b53_serdes_map_lane(dev, port);
218 	if (lane == B53_INVALID_LANE)
221 	id0 = b53_serdes_read(dev, lane, B53_SERDES_ID0, SERDES_ID0);
222 	msb = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_PHYSID1),
224 	lsb = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_PHYSID2),
232 		 "SerDes lane %d, model: %d, rev %c%d (OUI: 0x%08x)\n",
233 		 lane, id0 & SERDES_ID0_MODEL_MASK,
238 	pcs = &dev->pcs[lane];
240 	pcs->lane = lane;