nand/raw/mtk_nand.c

19 #include <linux/mtd/nand-ecc-mtk.h>
146 	struct mtk_ecc *ecc;
185 	return (u8 *)p + i * chip->ecc.size;
211 	return chip->ecc.size + mtk_nand->spare_per_sector;
225 	return nfc->buffer + i * mtk_data_len(chip) + chip->ecc.size;
335 		if (chip->ecc.size == 512)
341 		if (chip->ecc.size == 512)
347 		if (chip->ecc.size == 512)
364 	if (chip->ecc.size == 1024)
383 	nfc->ecc_cfg.strength = chip->ecc.strength;
384 	nfc->ecc_cfg.len = chip->ecc.size + mtk_nand->fdm.ecc_size;
645 	int size = chip->ecc.size + mtk_nand->fdm.reg_size;
650 	return mtk_ecc_encode(nfc->ecc, &nfc->ecc_cfg, data, size);
667 		bad_pos += nand->bad_mark.sec * chip->ecc.size;
682 	start = offset / chip->ecc.size;
683 	end = DIV_ROUND_UP(offset + len, chip->ecc.size);
686 	for (i = 0; i < chip->ecc.steps; i++) {
688 		       chip->ecc.size);
716 	for (i = 0; i < chip->ecc.steps; i++) {
719 			       chip->ecc.size);
757 	for (i = 0; i < chip->ecc.steps; i++) {
793 	nfi_writel(nfc, chip->ecc.steps << CON_SEC_SHIFT, NFI_CON);
812 					ADDRCNTR_SEC(reg) >= chip->ecc.steps,
845 		ret = mtk_ecc_enable(nfc->ecc, &nfc->ecc_cfg);
869 		mtk_ecc_disable(nfc->ecc);
926 		memset(buf, 0xff, sectors * chip->ecc.size);
932 	mtk_ecc_get_stats(nfc->ecc, &stats, sectors);
954 	start = data_offs / chip->ecc.size;
955 	end = DIV_ROUND_UP(data_offs + readlen, chip->ecc.size);
958 	column = start * (chip->ecc.size + spare);
960 	len = sectors * chip->ecc.size + (raw ? sectors * spare : 0);
961 	buf = bufpoi + start * chip->ecc.size;
982 		rc = mtk_ecc_enable(nfc->ecc, &nfc->ecc_cfg);
984 			dev_err(nfc->dev, "ecc enable\n");
1017 		rc = mtk_ecc_wait_done(nfc->ecc, ECC_DECODE);
1028 	mtk_ecc_disable(nfc->ecc);
1068 	for (i = 0; i < chip->ecc.steps; i++) {
1076 			       chip->ecc.size);
1129 	eccsteps = mtd->writesize / chip->ecc.size;
1150 	eccsteps = mtd->writesize / chip->ecc.size;
1159 	.ecc = mtk_nfc_ooblayout_ecc,
1169 	ecc_bytes = DIV_ROUND_UP(nand->ecc.strength *
1170 				 mtk_ecc_get_parity_bits(nfc->ecc), 8);
1201 	eccsteps = mtd->writesize / nand->ecc.size;
1204 	if (nand->ecc.size == 1024)
1220 	if (nand->ecc.size == 1024)
1235 	/* support only ecc hw mode */
1236 	if (nand->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) {
1237 		dev_err(dev, "ecc.engine_type not supported\n");
1242 	if (!nand->ecc.size || !nand->ecc.strength) {
1244 		nand->ecc.strength = requirements->strength;
1245 		nand->ecc.size = requirements->step_size;
1251 		if (nand->ecc.size < 1024) {
1254 				nand->ecc.size = 1024;
1255 				nand->ecc.strength <<= 1;
1257 				nand->ecc.size = 512;
1260 			nand->ecc.size = 1024;
1267 		/* calculate oob bytes except ecc parity data */
1268 		free = (nand->ecc.strength * mtk_ecc_get_parity_bits(nfc->ecc)
1273 		 * enhance ecc strength if oob left is bigger than max FDM size
1274 		 * or reduce ecc strength if oob size is not enough for ecc
1279 			nand->ecc.strength = (spare << 3) /
1280 					     mtk_ecc_get_parity_bits(nfc->ecc);
1283 			nand->ecc.strength = (spare << 3) /
1284 					     mtk_ecc_get_parity_bits(nfc->ecc);
1288 	mtk_ecc_adjust_strength(nfc->ecc, &nand->ecc.strength);
1291 		 nand->ecc.size, nand->ecc.strength);
1394 	nand->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
1396 	nand->ecc.write_subpage = mtk_nfc_write_subpage_hwecc;
1397 	nand->ecc.write_page_raw = mtk_nfc_write_page_raw;
1398 	nand->ecc.write_page = mtk_nfc_write_page_hwecc;
1399 	nand->ecc.write_oob_raw = mtk_nfc_write_oob_std;
1400 	nand->ecc.write_oob = mtk_nfc_write_oob_std;
1402 	nand->ecc.read_subpage = mtk_nfc_read_subpage_hwecc;
1403 	nand->ecc.read_page_raw = mtk_nfc_read_page_raw;
1404 	nand->ecc.read_page = mtk_nfc_read_page_hwecc;
1405 	nand->ecc.read_oob_raw = mtk_nfc_read_oob_std;
1406 	nand->ecc.read_oob = mtk_nfc_read_oob_std;
1507 	nfc->ecc = of_mtk_ecc_get(np);
1508 	if (IS_ERR(nfc->ecc))
1509 		return PTR_ERR(nfc->ecc);
1510 	else if (!nfc->ecc)
1565 	mtk_ecc_release(nfc->ecc);
1587 	mtk_ecc_release(nfc->ecc);