raw/brcmnand/brcmnand.c

771 	/* v7.2 has different ecc level shift in the acc register */
1097 		chip->ecc.strength = ecc_level * 2;
1099 		chip->ecc.strength = 1; /* hamming */
1101 		chip->ecc.strength = ecc_level;
1103 	if (chip->ecc.size == 0) {
1105 			chip->ecc.size = 1024;
1107 			chip->ecc.size = 512;
1305 	.ecc = brcmnand_hamming_ooblayout_ecc,
1321 	oobregion->offset = ((section + 1) * sas) - chip->ecc.bytes;
1322 	oobregion->length = chip->ecc.bytes;
1339 	if (sas <= chip->ecc.bytes)
1343 	oobregion->length = sas - chip->ecc.bytes;
1361 	if (section > 1 || sas - chip->ecc.bytes < 6 ||
1362 	    (section && sas - chip->ecc.bytes == 6))
1370 		oobregion->length = sas - chip->ecc.bytes - 6;
1377 	.ecc = brcmnand_bch_ooblayout_ecc,
1382 	.ecc = brcmnand_bch_ooblayout_ecc,
1390 	struct nand_ecc_ctrl *ecc = &host->chip.ecc;
1399 		ecc->bytes = 3 * sectors;
1410 	ecc->bytes = DIV_ROUND_UP(ecc_level * 14, 8);
1416 	if (ecc->bytes >= sas) {
1419 			ecc->bytes, sas);
2104 	struct mtd_oob_region ecc;
2115 	/* read without ecc for verification */
2116 	ret = chip->ecc.read_page_raw(chip, buf, true, page);
2120 	for (i = 0; i < chip->ecc.steps; i++) {
2121 		ecc_chunk = buf + chip->ecc.size * i;
2123 		mtd_ooblayout_ecc(mtd, i, &ecc);
2124 		ecc_bytes = chip->oob_poi + ecc.offset;
2126 		ret = nand_check_erased_ecc_chunk(ecc_chunk, chip->ecc.size,
2127 						  ecc_bytes, ecc.length,
2129 						  chip->ecc.strength);
2634 	brcmnand_wr_corr_thresh(host, DIV_ROUND_UP(chip->ecc.strength * 3, 4));
2688 	use_strap = of_property_read_bool(np, "brcm,nand-ecc-use-strap");
2691 	 * Either nand-ecc-xxx or brcm,nand-ecc-use-strap can be set. Error out
2694 	if (chip->ecc.strength && use_strap) {
2731 	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) {
2733 			chip->ecc.engine_type);
2737 	if (chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN) {
2738 		if (chip->ecc.strength == 1 && chip->ecc.size == 512)
2740 			chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
2743 			chip->ecc.algo = NAND_ECC_ALGO_BCH;
2746 	if (chip->ecc.algo == NAND_ECC_ALGO_HAMMING &&
2747 	    (chip->ecc.strength != 1 || chip->ecc.size != 512)) {
2749 			chip->ecc.strength, chip->ecc.size);
2753 	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_NONE &&
2754 	    (!chip->ecc.size || !chip->ecc.strength)) {
2757 			chip->ecc.size = requirements->step_size;
2758 			chip->ecc.strength = requirements->strength;
2760 				chip->ecc.size, chip->ecc.strength);
2764 	switch (chip->ecc.size) {
2766 		if (chip->ecc.algo == NAND_ECC_ALGO_HAMMING)
2769 			cfg->ecc_level = chip->ecc.strength;
2777 		if (chip->ecc.strength & 0x1) {
2783 		cfg->ecc_level = chip->ecc.strength >> 1;
2788 			chip->ecc.size);
2845 	chip->ecc.size = host->hwcfg.sector_size_1k ? 1024 : 512;
2854 		chip->ecc.write_oob = brcmnand_write_oob_raw;
2855 		chip->ecc.read_oob = brcmnand_read_oob_raw;
2888 	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
2889 	chip->ecc.read_page = brcmnand_read_page;
2890 	chip->ecc.write_page = brcmnand_write_page;
2891 	chip->ecc.read_page_raw = brcmnand_read_page_raw;
2892 	chip->ecc.write_page_raw = brcmnand_write_page_raw;
2893 	chip->ecc.write_oob_raw = brcmnand_write_oob_raw;
2894 	chip->ecc.read_oob_raw = brcmnand_read_oob_raw;
2895 	chip->ecc.read_oob = brcmnand_read_oob;
2896 	chip->ecc.write_oob = brcmnand_write_oob;
3316 	host->chip.ecc.size = pd->ecc_stepsize;
3317 	host->chip.ecc.strength = pd->ecc_strength;