Lines Matching defs:nand
13 * Derived from drivers/mtd/nand/autcpu12.c (removed in v3.8)
24 * (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c)
201 struct atmel_nand *nand);
203 int (*setup_interface)(struct atmel_nand *nand, int csline,
205 int (*exec_op)(struct atmel_nand *nand,
471 static void atmel_nand_data_in(struct atmel_nand *nand, void *buf,
476 nc = to_nand_controller(nand->base.controller);
485 !atmel_nand_dma_transfer(nc, buf, nand->activecs->io.dma, len,
489 if ((nand->base.options & NAND_BUSWIDTH_16) && !force_8bit)
490 ioread16_rep(nand->activecs->io.virt, buf, len / 2);
492 ioread8_rep(nand->activecs->io.virt, buf, len);
495 static void atmel_nand_data_out(struct atmel_nand *nand, const void *buf,
500 nc = to_nand_controller(nand->base.controller);
509 !atmel_nand_dma_transfer(nc, (void *)buf, nand->activecs->io.dma,
513 if ((nand->base.options & NAND_BUSWIDTH_16) && !force_8bit)
514 iowrite16_rep(nand->activecs->io.virt, buf, len / 2);
516 iowrite8_rep(nand->activecs->io.virt, buf, len);
519 static int atmel_nand_waitrdy(struct atmel_nand *nand, unsigned int timeout_ms)
521 if (nand->activecs->rb.type == ATMEL_NAND_NO_RB)
522 return nand_soft_waitrdy(&nand->base, timeout_ms);
524 return nand_gpio_waitrdy(&nand->base, nand->activecs->rb.gpio,
528 static int atmel_hsmc_nand_waitrdy(struct atmel_nand *nand,
534 if (nand->activecs->rb.type != ATMEL_NAND_NATIVE_RB)
535 return atmel_nand_waitrdy(nand, timeout_ms);
537 nc = to_hsmc_nand_controller(nand->base.controller);
538 mask = ATMEL_HSMC_NFC_SR_RBEDGE(nand->activecs->rb.id);
544 static void atmel_nand_select_target(struct atmel_nand *nand,
547 nand->activecs = &nand->cs[cs];
550 static void atmel_hsmc_nand_select_target(struct atmel_nand *nand,
553 struct mtd_info *mtd = nand_to_mtd(&nand->base);
559 nand->activecs = &nand->cs[cs];
560 nc = to_hsmc_nand_controller(nand->base.controller);
573 static int atmel_smc_nand_exec_instr(struct atmel_nand *nand,
579 nc = to_nand_controller(nand->base.controller);
583 nand->activecs->io.virt + nc->caps->cle_offs);
588 nand->activecs->io.virt + nc->caps->ale_offs);
591 atmel_nand_data_in(nand, instr->ctx.data.buf.in,
596 atmel_nand_data_out(nand, instr->ctx.data.buf.out,
601 return atmel_nand_waitrdy(nand,
610 static int atmel_smc_nand_exec_op(struct atmel_nand *nand,
620 atmel_nand_select_target(nand, op->cs);
621 gpiod_set_value(nand->activecs->csgpio, 0);
623 ret = atmel_smc_nand_exec_instr(nand, &op->instrs[i]);
627 gpiod_set_value(nand->activecs->csgpio, 1);
635 struct atmel_nand *nand = to_atmel_nand(chip);
641 nc->op.cs = nand->activecs->id;
664 struct atmel_nand *nand = to_atmel_nand(chip);
667 atmel_nand_data_in(nand, instr->ctx.data.buf.in,
671 atmel_nand_data_out(nand, instr->ctx.data.buf.out,
682 struct atmel_nand *nand = to_atmel_nand(chip);
684 return atmel_hsmc_nand_waitrdy(nand, instr->ctx.waitrdy.timeout_ms);
700 static int atmel_hsmc_nand_exec_op(struct atmel_nand *nand,
707 return nand_op_parser_exec_op(&nand->base,
710 atmel_hsmc_nand_select_target(nand, op->cs);
711 ret = nand_op_parser_exec_op(&nand->base, &atmel_hsmc_op_parser, op,
790 struct atmel_nand *nand = to_atmel_nand(chip);
799 ret = atmel_pmecc_enable(nand->pmecc, op);
809 struct atmel_nand *nand = to_atmel_nand(chip);
812 atmel_pmecc_disable(nand->pmecc);
817 struct atmel_nand *nand = to_atmel_nand(chip);
829 ret = atmel_pmecc_wait_rdy(nand->pmecc);
841 atmel_pmecc_get_generated_eccbytes(nand->pmecc, i,
852 struct atmel_nand *nand = to_atmel_nand(chip);
864 ret = atmel_pmecc_wait_rdy(nand->pmecc);
877 ret = atmel_pmecc_correct_sector(nand->pmecc, i, databuf,
879 if (ret < 0 && !atmel_pmecc_correct_erased_chunks(nand->pmecc))
905 struct atmel_nand *nand = to_atmel_nand(chip);
918 atmel_pmecc_disable(nand->pmecc);
987 struct atmel_nand *nand = to_atmel_nand(chip);
991 atmel_hsmc_nand_select_target(nand, chip->cur_cs);
999 nc->op.cs = nand->activecs->id;
1048 struct atmel_nand *nand = to_atmel_nand(chip);
1052 atmel_hsmc_nand_select_target(nand, chip->cur_cs);
1060 if (nand->activecs->rb.type != ATMEL_NAND_NATIVE_RB)
1070 nc->op.cs = nand->activecs->id;
1116 struct atmel_nand *nand = to_atmel_nand(chip);
1167 nand->pmecc = atmel_pmecc_create_user(nc->pmecc, &req);
1168 if (IS_ERR(nand->pmecc))
1169 return PTR_ERR(nand->pmecc);
1239 static int atmel_smc_nand_prepare_smcconf(struct atmel_nand *nand,
1247 nc = to_nand_controller(nand->base.controller);
1459 if (nand->base.options & NAND_BUSWIDTH_16)
1469 static int atmel_smc_nand_setup_interface(struct atmel_nand *nand,
1478 nc = to_nand_controller(nand->base.controller);
1480 ret = atmel_smc_nand_prepare_smcconf(nand, conf, &smcconf);
1487 cs = &nand->cs[csline];
1494 static int atmel_hsmc_nand_setup_interface(struct atmel_nand *nand,
1503 nc = to_hsmc_nand_controller(nand->base.controller);
1505 ret = atmel_smc_nand_prepare_smcconf(nand, conf, &smcconf);
1512 cs = &nand->cs[csline];
1527 struct atmel_nand *nand = to_atmel_nand(chip);
1535 nc = to_nand_controller(nand->base.controller);
1537 if (csline >= nand->numcs ||
1541 return nc->caps->ops->setup_interface(nand, csline, conf);
1548 struct atmel_nand *nand = to_atmel_nand(chip);
1551 nc = to_nand_controller(nand->base.controller);
1553 return nc->caps->ops->exec_op(nand, op, check_only);
1557 struct atmel_nand *nand)
1559 struct nand_chip *chip = &nand->base;
1563 nand->base.controller = &nc->base;
1581 struct atmel_nand *nand)
1583 struct nand_chip *chip = &nand->base;
1587 atmel_nand_init(nc, nand);
1594 for (i = 0; i < nand->numcs; i++)
1597 BIT(nand->cs[i].id), BIT(nand->cs[i].id));
1606 static int atmel_nand_controller_remove_nand(struct atmel_nand *nand)
1608 struct nand_chip *chip = &nand->base;
1617 list_del(&nand->node);
1626 struct atmel_nand *nand;
1637 nand = devm_kzalloc(nc->dev, struct_size(nand, cs, numcs), GFP_KERNEL);
1638 if (!nand)
1641 nand->numcs = numcs;
1644 "det", GPIOD_IN, "nand-det");
1653 nand->cdgpio = gpio;
1674 nand->cs[i].id = val;
1676 nand->cs[i].io.dma = res.start;
1677 nand->cs[i].io.virt = devm_ioremap_resource(nc->dev, &res);
1678 if (IS_ERR(nand->cs[i].io.virt))
1679 return ERR_CAST(nand->cs[i].io.virt);
1685 nand->cs[i].rb.type = ATMEL_NAND_NATIVE_RB;
1686 nand->cs[i].rb.id = val;
1691 "nand-rb");
1700 nand->cs[i].rb.type = ATMEL_NAND_GPIO_RB;
1701 nand->cs[i].rb.gpio = gpio;
1708 "nand-cs");
1717 nand->cs[i].csgpio = gpio;
1720 nand_set_flash_node(&nand->base, np);
1722 return nand;
1727 struct atmel_nand *nand)
1729 struct nand_chip *chip = &nand->base;
1734 if (nand->cdgpio && gpiod_get_value(nand->cdgpio)) {
1739 nc->caps->ops->nand_init(nc, nand);
1741 ret = nand_scan(chip, nand->numcs);
1754 list_add_tail(&nand->node, &nc->chips);
1762 struct atmel_nand *nand, *tmp;
1765 list_for_each_entry_safe(nand, tmp, &nc->chips, node) {
1766 ret = atmel_nand_controller_remove_nand(nand);
1779 struct atmel_nand *nand;
1787 nand = devm_kzalloc(nc->dev, sizeof(*nand) + sizeof(*nand->cs),
1789 if (!nand)
1792 nand->numcs = 1;
1794 nand->cs[0].io.virt = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
1795 if (IS_ERR(nand->cs[0].io.virt))
1796 return PTR_ERR(nand->cs[0].io.virt);
1798 nand->cs[0].io.dma = res->start;
1808 nand->cs[0].id = 3;
1819 nand->cs[0].rb.type = ATMEL_NAND_GPIO_RB;
1820 nand->cs[0].rb.gpio = gpio;
1831 nand->cs[0].csgpio = gpio;
1842 nand->cdgpio = gpio;
1844 nand_set_flash_node(&nand->base, nc->dev->of_node);
1846 return atmel_nand_controller_add_nand(nc, nand);
1879 struct atmel_nand *nand;
1881 nand = atmel_nand_create(nc, nand_np, reg_cells);
1882 if (IS_ERR(nand)) {
1883 ret = PTR_ERR(nand);
1887 ret = atmel_nand_controller_add_nand(nc, nand);
1980 struct atmel_nand *nand = to_atmel_nand(chip);
1999 * should define the following property in your nand node:
2007 "%s:nand.%d", dev_name(nc->dev),
2008 nand->cs[0].id);
2534 .compatible = "atmel,at91rm9200-nand-controller",
2538 .compatible = "atmel,at91sam9260-nand-controller",
2542 .compatible = "atmel,at91sam9261-nand-controller",
2546 .compatible = "atmel,at91sam9g45-nand-controller",
2550 .compatible = "atmel,sama5d3-nand-controller",
2554 .compatible = "microchip,sam9x60-nand-controller",
2559 .compatible = "atmel,at91rm9200-nand",
2563 .compatible = "atmel,sama5d4-nand",
2567 .compatible = "atmel,sama5d2-nand",
2605 * at91rm9200 controller, the atmel,nand-has-dma specify that
2611 "atmel,nand-has-dma"))
2616 * CLE to A22. If atmel,nand-addr-offset != 21 this means we're
2620 "atmel,nand-addr-offset", &ale_offs);
2638 struct atmel_nand *nand;
2643 list_for_each_entry(nand, &nc->chips, node) {
2646 for (i = 0; i < nand->numcs; i++)
2647 nand_reset(&nand->base, i);
2658 .name = "atmel-nand-controller",
2670 MODULE_ALIAS("platform:atmel-nand-controller");